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SLG47502V датащи(PDF) 50 Page - Renesas Technology Corp

номер детали SLG47502V
подробное описание детали  Low Voltage GreenPAK Programmable Mixed-Signal Matrix
PDF  192 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SLG47502V датащи(HTML) 50 Page - Renesas Technology Corp

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Datasheet
28-Feb-2023
CFR0011-120-00
Revision 2.3
50 of 194
© 2023 Renesas Electronics Corporation
SLG47512/13
Low Voltage GreenPAK Programmable
Mixed-Signal Matrix
Preliminary
Figure 22: 3-bit LUT1 or DFF4 or Shift Register 4
Figure 23: 3-bit LUT2 or DFF5 or Shift Register 5
3
8 memory cells
D_in
Clk
nSET/nRST
SET/RST
S1
S0
000
111
.
.
.
[7]
3-bit LUT
S0
S1
S1
S0
S0
S1
S0
S1
From Connectinon
Matrix Output [12]
3
ShRg/LUT_sel
Out[7:0]
8
3
7
4
LATCH/DFF_sel
nSET/nRST_sel
To Connection
Matrix Input [6]
ShRg_length [2:0]
1-bit NVM
7-bit NVM
LUT IN1
DFF data in
ShRg data in
LUT IN0
DFF CLK
ShRg CLK
From Connectinon
Matrix Output [11]
From Connectinon
Matrix Output [13]
LUT IN2
DFF nSet/nRST
ShRg nSet/nRST
LUT config
nQ/Q_sel
SET/RST_act_level
3
8 memory cells
D_in
Clk
nSET/nRST
SET/RST
S1
S0
000
111
.
.
.
[7]
3-bit LUT
S0
S1
S1
S0
S0
S1
S0
S1
From Connectinon
Matrix Output [15]
3
ShRg/LUT_sel
Out[7:0]
8
3
7
4
LATCH/DFF_sel
nSET/nRST_sel
To Connection
Matrix Input [7]
ShRg_length [2:0]
1-bit NVM
7-bit NVM
LUT IN1
DFF data in
ShRg data in
LUT IN0
DFF CLK
ShRg CLK
From Connectinon
Matrix Output [14]
From Connectinon
Matrix Output [16]
LUT IN2
DFF nSet/nRST
ShRg nSet/nRST
LUT config
nQ/Q_sel
SET/RST_act_level



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