SLG47502V datasheet(39/192 Pages) RENESAS

39 / 192 page

Datasheet

28-Feb-2023

CFR0011-120-00

Revision 2.3

39 of 194

SLG47512/13

Low Voltage GreenPAK Programmable

Mixed-Signal Matrix

Preliminary

[411:406]

IN0 of MLT6_LUT3_15 or Clock Input of DFF20 or

Delay6 Input (or Counter6 nRST Input)

[417:412]

IN1 of MLT6_LUT3_15 or nRST (nSET) of DFF20 or

Delay6 Input (or Counter6 nRST Input or External Clock Source)

[423:418]

IN2 of MLT6_LUT3_15 or Data Input of DFF20 or

Delay6 Input (or Counter6 nRST Input)

[429:424]

IN0 of MLT7_LUT3_16 or Clock Input of DFF21 or

Delay7 Input (or Counter7 nRST Input)

[435:430]

IN1 of MLT7_LUT3_16 or nRST (nSET) of DFF21 or

Delay7 Input (or Counter7 nRST Input or External Clock Source)

[441:436]

IN2 of MLT7_LUT3_16 or Data Input of DFF21 or

Delay7 Input (or Counter7 nRST Input)

[447:442]

GPIO0 Digital Output

[453:448]

GPIO1 Digital Output

[459:454]

GPIO2 Digital Output OE

[465:460]

GPIO2 Digital Output

[471:466]

GPIO3 Digital Output OE

[477:472]

GPIO3 Digital Output

[483:478]

GPIO4 Digital Output OE

[489:484]

GPIO4 Digital Output

[495:490]

GPIO5 Digital Output OE

[501:496]

GPIO5 Digital Output

[507:502]

GPIO6 Digital Output OE

[513:508]

GPIO6 Digital Output

[519:514]

GPIO7 Digital Output OE

[525:520]

GPIO7 Digital Output

[531:526]

GPIO8 Digital Output OE

[537:532]

GPIO8 Digital Output

[543:538]

GPIO9 Digital Output OE (Note 2)

[549:544]

GPIO9 Digital Output (Note 2)

[555:550]

GPIO10 Digital Output OE (Note 2)

[561:556]

GPIO10 Digital Output (Note 2)

[567:562]

GPIO11 Digital Output OE (Note 2)

[573:568]

GPIO11 Digital Output (Note 2)

[579:574]

GPIO12 Digital Output OE (Note 2)

[585:580]

GPIO12 Digital Output (Note 2)

[591:586]

Filter/Edge Detect Input

[597:592]

Programmable Delay/Edge Detect Input

[603:598]

PWR UP of ACMP0_H

Table 21: Matrix Output Table (Continued)

Address

Matrix Output Signal Function

Matrix Output

Number

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