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CS5308

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Design Example

Typical Design Requirements:

VIN = 5.0 Vdc

VOUT = 1.70 Vdc (nominal)

VOUT,RIPPLE = 10 mVPP max

VID Range: 1.050 Vdc − 1.825 Vdc

IO,MAX = 28 A at full−load

IOUT,LIM = 33 A min at 50°C (shutdown threshold)

dIIN/dt = 0.1 A/ms max

fSW = 335 kHz

h = 81% minimum

TA,MAX = 60°C

TJ,MAX = 115°C

TD,VTT = 2.5 ms (VTTPGD delay time)

TSS = 6.5 ms (Soft Start time)

DVOUT at no−load (static) =

+45 mV from VID setting = 1.745 Vdc

DVOUT at full−load (static) =

−45 mV from VID setting = 1.655 Vdc

DVOUT at full−load (transient) =

-90 mV from VID setting = 1.610 Vdc

1. Output Capacitor Selection

First, choose a low−cost, low−ESR output capacitor such as

the Rubycon 6.3ZA1000M10X16: 6.3 V, 1000

mF, 1.65 ARMS,

24 m

W, 10 × 16 mm. Calculate the minimum number of

output capacitors:

NOUT,MIN + ESR per capacitor @ D

IO,MAX

DVO,MAX

+ 24 mW @ 28 A (1.745 V * 1.610 V)

+ 4.987 or 5 capacitors minimum (5000 mF)

(1)

2. Output Inductor Selection

Calculate the minimum output inductance at IO,MAX

according to Equation 3 with ±20% inductor ripple current

(

a = 0.20):

LoMIN +

(VIN * VOUT) @ VOUT

(a @ IO,MAX @ VIN @ fSW)

(5 V * 1.655 V) @ 1.655 V

(0.2 @ 28 A @ 5V @ 335 kHz)

+ 590 nH

(3)

To save cost, we choose the inexpensive T50

-52 core

from Micrometals: 33 nH/N2, 3.19 cm./turn. At 14 A per

phase the permeability of this core will be approximately

80% of the permeability at 0 A. Therefore, at 0 A we must

achieve at least 590 nH/0.8 or 738 nH. Using four turns

results in only 528 nH, so we must use five turns of #16AWG

bifilar (2 m

W/ft.) to produce 825 nH. This inductor is

available as part number CTX22−15401 from Coiltronics.

Use Equation 4 to insure the output voltage ripple will

satisfy the design goal with the minimum number of

capacitors and the nominal output inductance:

VOUT,P−P + (ESR per cap NOUT,MIN) @

(VIN * #Phases @ VOUT) @ D (LoMIN @ fSW)

(4)

+ (24 mW 5) @

(5.0 V * 2 @ 1.7 V) @ (1.7 V 5.0 V) (825 nH @ 335 kHz)

+ (4.8 mW) @ {1.97 A}

+ 9.45 mV

The output voltage ripple will be decreased when output

capacitors are added to satisfy transient loading

requirements.

We will need the nominal and worst case inductor

resistances for subsequent calculations:

RL + 5 turns @ 3.19 cm turn @ 0.03218 ft cm @ 2mW ft

+ 1.03 mW

The inductor resistance will be maximized when the

inductor is “hot” due to the load current and the ambient

temperature is high. Assuming a 40°C temperature rise of

the inductor at full−load and a 25°C ambient temperature

rise we can calculate:

RL,MAX + 1.03 mW @ [1 ) 0.39% °C @ (40°C ) 25°C)]

+ 1.29 mW

3. Input Capacitor Selection

Use Equation 5 to determine the average input current to

the converter:

IIN,AVG + IO,MAX @ D h

+ 28 A @ (1.655 V 5.0 V) 0.81 + 11.44 A

(5)

Next, use Equations 6 to 10:

DILo + (VIN * VOUT) @ D (Lo @ fSW)

+ (5 V * 1.655 V) @

(1.655 V 5.0 V)

(825 nH @ 335 kHz)

+ 4.00 App

(10)

ILo,MAX + IO,MAX 2 ) DILo 2

+ 28 A 2 ) 4App 2 + 16 A

(8)

ILo,MIN + IO,MAX 2 * DILo 2

+ 28 A 2 * 4App 2 + 12 A

(9)

IC,MAX + ILo,MAX h * IIN,AVG

+ 16 A 0.81 * 11.44 A + 8.3 A

(6)

IC,MIN + ILo,MIN h * IIN,AVG

+ 12 A 0.81 * 11.44 A + 3.3 A

(7)

For the two−phase converter, the input capacitor(s) RMS

current is then (Note: D = 1.655 V/5 V = 0.331):

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