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FXPS7115D4 датащи(PDF) 42 Page - NXP Semiconductors |
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FXPS7115D4 датащи(HTML) 42 Page - NXP Semiconductors |
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42 / 72 page ![]() NXP Semiconductors FXPS7115D4 Digital absolute pressure sensor, 40 kPa to 115 kPa 7.7.11.3.1 DSP data type 0 selection bits (DATATYPE0) The DSP data type 0 selection bits select the type of data to be included in the SNSDATA0_L and SNSDATA0_H registers. DATATYPE0[1] DATATYPE0[0] SNSDATA register contents 0 1 Absolute pressure (PABS) 1 1 Temperature Table 67. DATATYPE0[1:0] 7.7.11.3.2 DSP data type 1 selection bits (DATATYPE1) The DSP data type 1 selection bits select the type of data to be included in the SNSDATA1_L and SNSDATA1_H registers. DATATYPE1[1] DATATYPE1[0] SNSDATA register contents 0 1 Absolute pressure (PABS) 1 1 Temperature Table 68. DATATYPE1[1:0] 7.7.11.4 DSP_CFG_U4 - DSP user configuration #4 register (address 43h) The DSP user configuration register #4 is a user programmable read/write register that contains DSP-specific configuration information. This register is included in the read/write array error detection. Bit 7 6 5 4 3 2 1 0 Symbol reserved reserved reserved reserved reserved INT_OUT reserved reserved Reset 0 0 0 0 0 0 0 0 Access R/W R/W R/W R/W R/W R/W R/W R/W Table 69. DSP_CFG_U4 - DSP user configuration #4 register (address 43h) bit allocation Bit Symbol Description 2 INT_OUT The interrupt pin configuration bit selects the mode of operation for the interrupt pin. 0 — Open drain, active high with pull-down current 1 — Open drain, active low with pullup current Table 70. DSP_CFG_U4 - DSP user configuration #4 register (address 43h) bit description 7.7.11.5 DSP_CFG_U5 - DSP user configuration #5 register (address 44h) The DSP user configuration register #5 is a read/write register that contains DSP-specific configuration information. This register is included in the read/write array error detection. Bit 7 6 5 4 3 2 1 0 Symbol ST_CTRL[3:0] reserved Factory default 0 0 0 0 0 0 0 0 Access R/W R/W R/W R/W R/W R/W R/W R/W Table 71. DSP_CFG_U5 - DSP user configuration #5 register (address 44h) bit allocation FXPS7115D4 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 6.2 — 28 June 2023 42 / 72 |
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