FXPS7115D4 datasheet(16/72 Pages) NXP

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NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

rSTART

CLIENT ADDRESS

Host transmission

Client transmission

aaa-029919

7.4.6.3 Sensor data register read wrap around

The device includes automatic sensor data register read wrap-around features to optimize the number of

I2C transactions necessary for continuous reads of sensor data. Depending on the state of the SIDx_EN

bits in the SOURCEID_0 and SOURCEID_1 registers, the register address automatically wraps back to the

DEVSTAT_COPY register as shown in Table 9.

SID1_EN

SID0_EN

Address increment and wrap-around effect

Optimized register-read sequence

Address wraps around from FFh to 00h

None

Address wraps from 63h (SNSDATA0_H) to 61h

(DEVSTAT_COPY)

DEVSTAT_COPY, SNSDATA0_L, SNSDATA0_H

Address wraps from 65h (SNSDATA1_H) to 61h

(DEVSTAT_COPY)

DEVSTAT_COPY, SNSDATA0_L, SNSDATA0_H,

SNSDATA1_L, SNSDATA1_H

Address wraps from 69h (SNSDATA0_TIME3) to 61h

(DEVSTAT_COPY)

DEVSTAT_COPY, SNSDATA0_L, SNSDATA0_H,

SNSDATA1_L, SNSDATA1_H, SNSDATA0_TIME0,

SNSDATA0_TIME1, SNSDATA0_TIME2, SNSDATA0_

TIME3

Table 9. Sensor data register read wrap-around description

7.4.7 I2C timing diagram

aaa-029751

SDA

70 %

30 %

70 %

30 %

70 %

30 %

70 %

9th clock

... cont.

tHIGH

tLOW

tVD;DAT

tBUF

tHD;DAT

tHD;STA

1 / fSCL

1st clock cycle

tSU;DAT

tSU;STO

tVD;ACK

tHD;STA

tSU;STA

tSP

30 %

70 %

30 %

70 %

30 %

70 %

30 %

SCL

... SDA

... SCL

Figure 19. I2C timing diagram

FXPS7115D4

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6.2 — 28 June 2023

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