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ADV7340EBZ датащи(PDF) 16 Page - Analog Devices

номер детали ADV7340EBZ
подробное описание детали  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video짰 DACS
PDF  88 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADV7340EBZ датащи(HTML) 16 Page - Analog Devices

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ADV7340/ADV7341
Rev. 0 | Page 16 of 88
Y9 TO Y2/
Y9 TO Y0
Cb0
Y0
Cr0
Y1
b
a
P_HSYNC
P_VSYNC
P_BLANK
c
Y OUTPUT
a AND b AS PER RELEVANT STANDARD.
c = PIPELINE DELAY. PLEASE REFER TO RELEVANT PIPELINE DELAY. THIS CAN BE FOUND IN THE DIGITAL TIMING
SPECIFICATION SECTION OF THE DATA SHEET.
A FALLING EDGE OF HSYNC INTO THE ENCODER GENERATES A FALLING EDGE OF TRI-LEVEL SYNC ON THE OUTPUT
AFTER A TIME EQUAL TO THE PIPELINE DELAY.
Figure 17. HD-DDR, 8-/10-Bit, 4:2:2 YCrCb (HSYNC/VSYNC) Input Timing Diagram
Cb
Y
Cr
Y
PAL = 264 CLOCK CYCLES
NTSC = 244 CLOCK CYCLES
S9 TO S0/
Y9 TO Y0*
S_VSYNC
S_HSYNC
*SELECTED BY SUBADDRESS 0x01, BIT 7.
Figure 18. SD Input Timing Diagram (Timing Mode 1)



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