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ADV7340EBZ датащи(PDF) 67 Page - Analog Devices

номер детали ADV7340EBZ
подробное описание детали  Multiformat Video Encoder, Six 12-Bit Noise Shaped Video짰 DACS
PDF  88 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADV7340EBZ датащи(HTML) 67 Page - Analog Devices

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ADV7340/ADV7341
Rev. 0 | Page 67 of 88
0
–80
–70
–60
–50
–40
–30
–20
–10
0
–30
–60
–90
–120
–150
–180
–210
–240
1M
10M
100M
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
1G
GROUP DELAY (Seconds)
PHASE (Degrees)
MAGNITUDE (dB)
21n
18n
15n
12n
9n
6n
3n
0
24n
Figure 87. Output Filter Plot for SD, 16× Oversampling
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
1M
10M
100M
1G
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
MAGNITUDE (dB)
GROUP DELAY (Seconds)
PHASE
(Degrees)
320
240
160
80
0
–80
–160
–240
480
400
14n
12n
10n
8n
6n
4n
2n
0
18n
16n
Figure 88. Output Filter Plot for ED, 8× Oversampling
0
–50
1
FREQUENCY (MHz)
CIRCUIT FREQUENCY RESPONSE
10
100
–10
–20
–30
–40
200
–200
120
40
–40
–120
GROUP DELAY (Seconds)
PHASE
(Degrees)
MAGNITUDE (dB)
Figure 89. Output Filter Plot for HD, 4× Oversampling
PRINTED CIRCUIT BOARD (PCB) LAYOUT
The ADV7340/ADV7341 are highly integrated circuits
containing both precision analog and high speed digital
circuitry. They have been designed to minimize interference
effects on the integrity of the analog circuitry by the high speed
digital circuitry. It is imperative that these same design and
layout techniques be applied to the system-level design so that
optimal performance is achieved.
The layout should be optimized for lowest noise on the
ADV7340/ADV7341 power and ground planes by shielding the
digital inputs and providing good power supply decoupling.
It is recommended to use a 4-layer printed circuit board with
ground and power planes separating the signal trace layer and
the solder side layer.
Component Placement
Component placement should be carefully considered to
separate noisy circuits, such as clock signals and high speed
digital circuitry from analog circuitry.
The external loop filter components and components connected
to the COMP, VREF, and RSET pins should be placed as close as
possible to and on the same side of the PCB as the
ADV7340/ADV7341. Adding vias to the PCB to get the
components closer to the ADV7340/ADV7341 is not
recommended.
It is recommended that the ADV7340/ADV7341 be placed as
close as possible to the output connector, with the DAC output
traces as short as possible.
The termination resistors on the DAC output traces should be
placed as close as possible to and on the same side of the PCB as
the ADV7340/ADV7341. The termination resistors should
overlay the PCB ground plane.
External filter and buffer components connected to the DAC
outputs should be placed as close as possible to the
ADV7340/ADV7341 to minimize the possibility of noise
pickup from neighboring circuitry, and to minimize the effect
of trace capacitance on output bandwidth. This is particularly
important when operating in low drive mode (RSET = 4.12 kΩ,
RL = 300 Ω).
Power Supplies
It is recommended that a separate regulated supply be provided
for each power domain (VAA, VDD, VDD_IO, and PVDD). For
optimal performance, linear regulators rather than switch mode
regulators should be used. If switch mode regulators must be
used, care must be taken with regard to the quality of the output
voltage in terms of ripple and noise. This is particularly true for
the VAA and PVDD power domains. Each power supply should be
individually connected to the system power supply at a single
point through a suitable filtering device, such as a ferrite bead.



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