ICS557-08

2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS GEN1

PCIE MULTIPLEXER

IDT® 2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS GEN1

2

ICS557-08

REV L 112111

Pin Assignment

Select Table

Pin Descriptions

1

2

3

IN2

4

IN1

5

6

GND

7

8

GND

VDD

SEL

IN2

IN1

16

PD

GND

CLK

VDD

15

14

13

12

11

10

9

16-pin (173 mil) TSSOP

OE

VDD

IREF

CLK

SEL

Input Pair Selected

0IN2/ IN2

1IN1/ IN1

Pin

Pin Name

Pin Type

Pin Description

1

VDD

Power

Connect to +3.3 V. Supply voltage for Input clocks.

2

IN1

Input

HCSL true input signal 1.

3

IN1

Input

HCSL complimentary input signal 1.

4

PD

Input

Powers down the chip and tri-states outputs when low. Internal pull-up

5

IN2

Input

HCSL true input signal 2.

6

IN2

Input

HCSL complimentary input signal 2.

7

OE

Input

Provides output or, tri-states output (High = enable outputs; Low = disable).

Internal pull-up resistor.

8

GND

Power

Connect to ground.

9

IREF

Output

Precision resistor attached to this pin is connected to the internal current

10

VDD

Power

Connect to +3.3 V. Supply Voltage for Output Clocks.

11

VDD

Power

Connect to +3.3 V. Supply Voltage for Output Clocks.

12

GND

Power

Connect to ground.

13

GND

Power

Connect to ground.

14

CLK

Output

HCSL/LVDS Complimentary output clock .

15

CLK

Output

HCSL/LVDS True output clock.

16

SEL

Input

SEL=1 selects IN1/IN1. SEL =0 selects IN2/ IN2. Internal pull-up resistor.