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ICS557-08 датащи(PDF) 8 Page - Renesas Technology Corp

номер детали ICS557-08
подробное описание детали  2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS GEN1
PDF  13 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS557-08 датащи(HTML) 8 Page - Renesas Technology Corp

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ICS557-08
2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS GEN1
PCIE MULTIPLEXER
IDT® 2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS GEN1
8
ICS557-08
REV L 112111
AC Electrical Characteristics
Unless stated otherwise, VDD=3.3 V ±5%, Ambient Temperature -40 to +85
° C
1 Test setup is R
L=50 ohms with 2 pF, Rr = 475Ω (1%).
2 Measurement taken from a single-ended waveform.
3 Measurement taken from a differential waveform.
4 Measured at the crossing point where instantaneous voltages of both CLK and CLK are equal.
5 CLK and CLK pins are tri-stated when OE is Low asserted. CLK and CLK are driven differential when OE is High
unless its PD = low.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Frequency
HCSL termination
200
MHz
LVDS termination
100
MHz
Input High Voltage1,2
VIH
HCSL
660
700
850
mV
Input Low Voltage1,2
VIL
HCSL
-150
0
mV
Differential Input
Voltages
| VID |
LVDS
250
350
450
mV
Input Offset Voltage
(VIS)
LVDS
1.125
1.25
1.375
V
Output High Voltage1,2
VOH
HCSL
660
700
850
mV
Output Low Voltage1,2
VOL
HCSL
-150
0
27
mV
Crossing Point
Voltage1,2
Absolute
250
350
550
mV
Crossing Point
Voltage1,2,4
Variation over all edges
140
mV
Rise Time1,2
tOR
From 0.175 V to 0.525 V
175
332
700
ps
Fall Time1,2
tOF
From 0.525 V to 0.175 V
175
344
700
ps
Rise/Fall Time
Variation1,2
125
ps
Duty Cycle1,3
45
55
%
Output Enable Time5
All outputs
10
μs
Output Disable Time5
All outputs
10
μs
Stabilization Time
tSTABLE
From power-up VDD=3.3 V
3.0
ms
Input to Output Delay
Input differential clock to output
differential clock delay measured at
crossing point of input levels to
crossing point of output levels
24
6
ns



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