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ICS9FG107 датащи(PDF) 4 Page - Renesas Technology Corp |
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ICS9FG107 датащи(HTML) 4 Page - Renesas Technology Corp |
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4 / 19 page ![]() IDTTM/ICSTM Programmable FTG for Differential P4 TM CPU, PCI-Express & SATA Clocks ICS9FG107 REV F 08/21/07 ICS9FG107 Programmable FTG for Differential P4 TM CPU, PCI-Express & SATA Clocks 4 Pin Description (Continued) PIN # PIN NAME PIN TYPE DESCRIPTION 25 DIF_STOP# IN Active low input to stop differential output clocks. 26 SPREAD* IN Asynchronous, active high input, with internal 120Kohm pull-up resistor, to enable spread spectrum functionality. 27 SEL14M_25M#** IN Select 14.31818 MHz or 25 Mhz input frequency. 1 = 14.31818 MHz, 0 = 25 MHz 28 OE_3* IN Active high input for enabling output 3. 0 = tri-state outputs, 1= enable outputs 29 DIF_3# OUT 0.7V differential complement clock output 30 DIF_3 OUT 0.7V differential true clock output 31 VDD PWR Power supply, nominal 3.3V 32 DIF_2# OUT 0.7V differential complement clock output 33 DIF_2 OUT 0.7V differential true clock output 34 OE_2** IN Active high input for enabling output 2. 0 = tri-state outputs, 1= enable outputs 35 GND PWR Ground pin. 36 VDD PWR Power supply, nominal 3.3V 37 OE_1** IN Active high input for enabling output 1. 0 = tri-state outputs, 1= enable outputs 38 DIF_1# OUT 0.7V differential complement clock output 39 DIF_1 OUT 0.7V differential true clock output 40 VDD PWR Power supply, nominal 3.3V 41 DIF_0# OUT 0.7V differential complement clock output 42 DIF_0 OUT 0.7V differential true clock output 43 OE_0* IN Active high input for enabling output 0. 0 = tri-state outputs, 1= enable outputs 44 FS1** IN 3.3V Frequency select latched input pin. 45 DWNSPRD#* IN 3.3V input that selects spread mode. This input is not latched at power up. 0 = Down Spread, 1 = Center Spread 46 IREF OUT This pin establishes the reference current for the differential current- mode output pairs. This pin requires a fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard value. 47 GNDA PWR Ground pin for the PLL core. 48 VDDA PWR 3.3V power for the PLL core. Pins preceeded by * have 120 Kohm pull UP resistors Pins preceeded by ** have 120 Kohm pull DOWN resistors |
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