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PowerPC 601 RISC Microprocessor Technical Summary

The following sections summarize the PowerPC registers that are implemented in the 601 processor.

Chapter 2, “Register Models and Data Types,” in the PowerPC 601 RISC Microprocessor User’s Manual

provides detailed information about the registers implemented in the 601.

3.2.1.1 General-Purpose Registers (GPRs)

The PowerPC architecture defines 32 user-level, general-purpose registers (GPRs). These registers are either

32 bits wide in 32-bit PowerPC implementations and 64 bits wide in 64-bit PowerPC implementations. The

GPRs serve as the data source or destination for all integer instructions.

3.2.1.2 Floating-Point Registers (FPRs)

The PowerPC architecture also defines 32 user-level 64-bit floating-point registers (FPRs). The FPRs serve

as the data source or destination for floating-point instructions. These registers can contain data objects of

either single- or double-precision floating-point formats.

3.2.1.3 Condition Register (CR)

The CR is a 32-bit user-level register that consists of eight four-bit fields that reflect the results of certain

operations, such as move, integer and floating-point compare, arithmetic, and logical instructions, and

provide a mechanism for testing and branching.

3.2.1.4 Floating-Point Status and Control Register (FPSCR)

The floating-point status and control register (FPSCR) is a user-level register that contains all exception

signal bits, exception summary bits, exception enable bits, and rounding control bits needed for compliance

with the IEEE 754 standard.

3.2.1.5 Machine State Register (MSR)

The machine state register (MSR) is a supervisor-level register that defines the state of the processor. The

contents of this register is saved when an exception is taken and restored when the exception handling

completes. The 601 implements the MSR as a 32-bit register; 64-bit PowerPC processors implement a 64-

bit MSR.

3.2.1.6 Segment Registers (SRs)

For memory management, 32-bit PowerPC implementations implement sixteen 32-bit segment registers

(SRs). The fields in the segment register are interpreted differently depending on the value of bit 0.

3.2.1.7 Special-Purpose Registers (SPRs)

The PowerPC operating environment architecture defines numerous special-purpose registers that serve a

variety of functions, such as providing controls, indicating status, configuring the processor, and performing

special operations. Some SPRs are accessed implicitly as part of executing certain instructions. All SPRs

can be accessed by using the Move to/from Special Purpose Register instructions, mtspr and mfspr.

In the 601, all SPRs are 32 bits wide.

Freescale Semiconductor, Inc.

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Go to: www.freescale.com

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