AD9389SLASHPCB datasheet(38/48 Pages) AD

38 / 48 page

AD9389

Rev. 0 | Page 38 of 48

0x84—Bits[7:0] ISRC2_PB0

This is transmitted only when the ISRC continue bit (Register

0x73 Bit 7) is set to 1.

0x85—Bits[7:0] ISRC2_PB1

0x86—Bits[7:0] ISRC2_PB2

0x87—Bits[7:0] ISRC2_PB3

0x88—Bits[7:0] ISRC2_PB4

0x89—Bits[7:0] ISRC2_PB5

0x8A—Bits[7:0] ISRC2_PB6

0x8B—Bits[7:0] ISRC2_PB7

0x8C—Bits[7:0] ISRC2_PB8

0x8D—Bits[7:0] ISRC2_PB9

0x8E—Bits[7:0] ISRC2_PB10

0x8F—Bits[7:0] ISRC2_PB11

0x90—Bits[7:0] ISRC2_PB12

0x91—Bits[7:0] ISRC2_PB13

0x92—Bits[7:0] ISRC2_PB14

0x93—Bits[7:0] ISRC2_PB15

0x94—Bits[7:0] mask1

0x95—Bits[7:6] mask2

0x96—Bit[7] HPD_INT

0x96—Bit[6] MSEN_INT

0x96—Bit[5] VS_INT

0x96—Bit[4]AUD_FIFO_FULL_INT

0x96—Bit[3] ITU656_ERR_INT

0x96—Bit[2] EDID_RDY_INT

0x97—Bit[7] HDCP_ERR_INT

0x97—Bit[6] BKSV_flag

0x97—Bit[2]

0x98—Bit[7]

0x98—Bits[3:0]

0x9C—Bits[7:0]

0x9D—Bits[3:0]

0xA2—Bits[7:0]

0xA3—Bits[7:0]

0xAF—Bit[7] HDCP_desired

0xAF—Bit[4] frame_enc

0xAF—Bit[1] ext_HDMI_MODE

0xB0—Bits[7:0] An_0

0xB1—Bits[7:0] An_1

0xB2—Bits[7:0] An_2

0xB3—Bits[7:0] An_3

0xB4—Bits[7:0] An_4

0xB5—Bits[7:0] An_5

0xB6—Bits[7:0] An_6

0xB7—Bits[7:0] An_7

0xB7—Bit[6] ENC_on

0xB7—Bit[5] int_HDMI_MODE

0xB7—Bit[4] keys_read_error

0xBA—Bits[7:5] clk_delay

0xBA—Bit[4] clk_delay

0xBE—Bit[7] BCAPS

0xBE—Bit[6]

0xBE—Bit[5]

0xBE—Bit[4]

0xBE—Bits[3:2]

0xBE—Bit[1]

0xBE—Bit[0]

0xBF—Bits[7:0] Bksv1

0xC0—Bits[7:0] Bksv Byte2

0xC1—Bits[7:0] Bksv3

0xC2—Bits[7:0] Bksv4

0xC3—Bits[7:0] Bksv5

0xC4—Bits[7:0] EDID Segment

These bits support up to 256 EDID segments that can be

addressed. The requested segment address is written here before

initiation of the read.

0xC5—Bit[7] ErrorFlag

0xC5—Bit[6] AN Stop

0xC5—Bit[5] HDCP Enabled

0xC5—Bit[4] EDID Ready

0xC5—Bit[3] I2C

0xC5—Bit[2] RI

0xC5—Bit[1] BKSV Update

0xC5—Bit[0] PJ

0xC6—Bit[4] HDMI Mode

0xC6—Bit[3] HDCP Requested

0xC6—Bit[2] Rx Sense

0xC6—Bit[1] EEPROM Read

0xC7—Bit[7] BKSV Flag

0xC7—Bits[6:0] BKSV Count

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