AD9389SLASHPCB datasheet(33/48 Pages) AD

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AD9389

Rev. 0 | Page 33 of 48

2-WIRE SERIAL CONTROL REGISTER DETAIL CHIP IDENTIFICATION

0x00—Bits[7:0] Chip Revision

An 8-bit register that represents the silicon revision.

0x01—Bits[3:0] N[19:16]

These are the most significant four bits of a 20-bit word used

along with the 20-bit CTS term in the receiver to regenerate the

audio clock.

0x02—Bits[7:0] N[15-8]

0x03—Bits[7:0] [(7-0]

0x04—Bits[3:0] CTS_Int[19:16]

These are the most significant four bits of a 20-bit word used

along with the 20-bit N term in the receiver to regenerate the

audio clock. This is the measured or internal CTS. The internal

or external CTS can be selected via 0x0A Bit 7.

0x05—Bits[7:0] CTS_Int[15:8]

0x06—Bits[7:0] CTS_In[7:0]

0x07—Bits[3:0] CT_Ext[19:16])

These are the most significant four bits of a 20-bit word used

along with the 20-bit N term in the receiver to regenerate the

audio clock. This is the external CTS. The internal or external

CTS can be selected via 0x0A Bit 7.

0x08—Bits[7:0] CTS_Ext[15:8]

0x09—Bits[7:0] CTS_Ext[7:0]

0x0A—Bits[7] CTS_Sel

When internal CTS is selected, the CTS is calculated by the

AD9389.

0 = internal CTS

1 = external CTS

0x0A—Bits[6:5] Avg_Mode

00 = no filter

01 = divide by 4

10 = divide by 8

11 = divide by 16

Default = 10

0x0A—Bit[4] Audio_Sel

0 = I2S

1 = S/PDIF

Default = 0

0x0A—Bit[3] MCLK_SP

If MCLK is available for S/PDIF, it is used for bit recovery;

otherwise, internal circuitry is used.

1 = MCLK active

0 = MCLK inactive

Default = 0

0x0A—Bit[2] MCLK_I2S

1 = I2S MCLK active

0 = I2S MCLK inactive

Default = 0

If MCLK is available for I2S, it is used for bit recovery;

otherwise, internal circuitry is used.

0x0A—Bits[1:0] MCLK_Ratio

00 = ×128 fS

01 = ×256 fS

10 = ×384 fS

11 = ×512 fS

Default = 01

0x0B—Bit[6] MCLK_ Pol

0 = rising edge

1 = falling edge

Default = 0

0x0B—Bit[5] Flat_Line

1 = flat line audio (audio sample not valid)

0 = normal

Default = 0

0x0C—Bits[5:2] I2S enable

0001 = I2S0

0010 = I2S1

0100 = I2S2

1000 = I2S3

Default = 1111 for all

0x0C—Bits[1:0] I2S Format

00 = standard I2S mode

01 = right-justified I2S mode

10 = left-justified I2S mode

11 = raw IEC60958 mode

Default = 00

0x0D—Bits[4:0] I2S bit width

For right-justified audio only. Default is 11000 (24). Not valid

for widths greater than 24.

0x0E—Bits[5:3] SUBPKT0_L_src

Source of audio subpacket 0 (left channel) data. Default

is 000.

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