SN250 datasheet(108/130 Pages) STMICROELECTRONICS

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Functional description—application modules

SN250

108/130

7.5

ADC module

The ADC is a first-order sigma-delta converter sampling at 1MHz with programmable

resolution and conversion rate. The conversion rate is programmed by setting the

ADC_RATE

bits in the ADC_CFG register.

The analog input of the ADC can be chosen from various sources and is configured with the

ADC_SEL

bits in the ADC_CFG register. As described in Table 34, the ADC inputs can be

single-ended (routed individually to ADC0, ADC1, ADC2, or ADC3) or differential (routed to

pairs ADC0-ADC1 and ADC2-ADC3). For selecting alternate pin functions, refer to Table 17

and Table 18.

Setting the ADC_EN bit in the ADC_CFG register will cause the ADC to immediately begin

conversions. The ADC will continually generate conversions until the ADC_EN bit is cleared.

When each conversion completes, an INT_ADC interrupt is generated. In order for this to

interrupt the CPU the interrupt mask INT_ADC must be enabled in the INT_CFG register.

The INT_ADC interrupt is the only means for determining when a conversion completes.

After each INT_ADC interrupt, the INT_ADC interrupt bit must be cleared to detect

completion of the next conversion.

Table 33.

ADC conversion rate

ADC_RATE[2:0]

Conversion Time

Equivalent ADC Bits

032

μs

5, located in ADC_DATA[15:11]

164

μs

6, located in ADC_DATA[15:10]

128

μs

7, located in ADC_DATA[15:9]

256

μs

8, located in ADC_DATA[15:8]

512

μs

9, located in ADC_DATA[15:7]

1024

μs

10, located in ADC_DATA[15:6]

2048

μs

11, located in ADC_DATA[15:5]

4096

μs

12, located in ADC_DATA[15:4]

Table 34.

ADC inputs

ADC_SEL[3:0]

Analog Source of ADC

GPIO Pin

Purpose

ADC0

Single-ended

ADC1

Single-ended

ADC2

Single-ended

ADC3

Single-ended

(1/4) * VDD_PADS (2.1–3.6V pad supply)

Supply monitoring

(1/2) * VDD (1.8V core supply)

Supply monitoring

RESERVED

VSS (0V)

Calibration

VREF

Calibration

ADC0–ADC1

4–5

Differential

ADC2–ADC3

6–7

Differential

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