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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SN250 датащи(PDF) 72 Page - STMicroelectronics |
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SN250 датащи(HTML) 72 Page - STMicroelectronics |
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72 / 130 page  Functional description—application modules SN250 72/130 When the slave select (nSSEL) signal is asserted (by the Master), SC2 SPI transmit data is driven to the output pin MISO and SC2 SPI data is received from the input pin MOSI. The slave select signal nSSEL is used to enable driving the serialized data output signal MISO. It is also used to reset the SC2 SPI slave shift register. Characters received and transmitted are passed through receive and transmit FIFOs. The transmit and receive FIFOs are 4 bytes deep. These FIFOs are accessed under software control by accessing the SC2_DATA data register or under hardware control using a DMA controller. Any character received is stored in the (empty) receive FIFO. The register bit SC_SPIRXVAL in the SC2_SPISTAT register is set to indicate that not all received characters are read out from receive FIFO. If software or DMA is not reading from the receive FIFO, the receive FIFO will store up to 4 characters. Any further reception is dropped, and the register bit SC_SPIRXOVF in the SC2_SPISTAT register is set. The RX Table 25. SC2 SPI slave formats SC2_SPICFG Frame Format 20000 SC2-4S mode 20001 SC2-4S mode 20010 SC2-4S mode 20011 SC2-4S mode 201 - - SC2-4S mode Same as above except LSB first instead of MSB first 20 - - - SC2- 3M mode Illegal 20 - - - SC2-2 mode Illegal |
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