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DS20006185A-page 9

ATF1504ASV/ATF1504ASVL

Timing Model

TABLE 1-3:

PIN CAPACITANCE

Typical

Maximum

Units

Conditions

CIN

—8

pF

VIN =0V; f=1.0MHz

CI/O

—8

pF

VOUT =0V; f=1.0MHz

Note 1: Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

2: The OGI pin (high-voltage pin during programming) has a maximum capacitance of 12 pF.

TABLE 1-4:

AC CHARACTERISTICS

Symbol

Parameter

-15

-20

Units

Min.

Max.

Min.

Max.

tPD1

Input or Feedback to Non-Registered Output

3

15

—

20

ns

tPD2

I/O Input or Feedback to Non-Registered Feedback

3

12

—

16

ns

tSU

Global Clock Setup Time

11

—

13.5

—

ns

tH

Global Clock Hold Time

0

—

0

—

ns

tFSU

Global Clock Setup Time of Fast Input

3

—

3

—

ns

tFH

Global Clock Hold Time of Fast Input

1.0

—

2

—

ns

tCOP

Global Clock to Output Delay

—

9

—

12

ns

tCH

Global Clock High Time

5

—

6

—

ns

tCL

Global Clock Low Time

5

—

6

—

ns

tASU

Array Clock Setup Time

5

—

7

—

ns

tAH

Array Clock Hold Time

4

—

4

—

ns

tACOP

Array Clock Output Delay

—

15

—

18.5

ns

tACH

Array Clock High Time

6

—

8

—

ns

Input

Delay

t

IN

Switch

Matrix

t

UIM

Foldback Term

Delay

t

SEXP

Register Control

Delay

t

LAC

t

IC

t

EN

Logic Array

Delay

t

LAD

Global Control

Delay

t

GLOB

Internal Output

Enable Delay

t

IOE

Cascade Logic

Delay

t

PEXP

Fast Input

Delay

t

FIN

Register

Delay

t

SU

t

H

t

PRE

t

CLR

t

RD

t

COMB

t

FSU

t

FH

Output

Delay

t

OD1

t

OD2

t

OD3

t

XZ

t

ZX1

t

ZX2

t

ZX3

I/O

Delay

t

IO