MFS5600AMMA7ES datasheet(53/111 Pages) NXP

53 / 111 page

NXP Semiconductors

FS5600

Automotive buck regulator and controller with voltage monitors and watchdog timer

Flag name

Description

ABIST_VMON3_OV_ERR = 1

indicates that the VMON3's over voltage

monitor is not operating in the expected range.

ABIST_VMON3_UV_ERR = 1

indicates that the VMON3's under voltage

monitor is not operating in the expected range.

ABIST_VMON4_OV_ERR = 1

indicates that the VMON4's over voltage

monitor is not operating in the expected range.

ABIST_VMON4_UV_ERR = 1

indicates that the VMON4's under voltage

monitor is not operating in the expected range.

ABIST_SW1_OV_ERR = 1

indicates that the SW1's over voltage monitor is

not operating in the expected range.

ABIST_SW1_UV_ERR = 1

indicates that the SW1's under voltage monitor

is not operating in the expected range.

ABIST_SW2_OV_ERR = 1

indicates that the SW2's over voltage monitor is

not operating in the expected range.

ABIST_SW2_UV_ERR = 1

indicates that the SW2's under voltage monitor

is not operating in the expected range.

Table 51. ABIST flag bits...continued

The above bits are all 0 if ABIST test is successful.

17.12.2 On-demand ABIST

When in the NORMAL STATE or INIT_RUN state, an application can request an on-

demand ABIST to be performed by setting the OD_ABIST bit. This OD_ABIST bit is self-

clearing after completing the on-demand ABIST.

FS0B is asserted low during on-demand ABIST if initiated in the INIT_RUN state.

FS0B remains high during on-demand ABIST if initiated in the NORMAL state.

17.12.3 Logical Built-In Self-Test (LBIST)

The FS5600 includes a Logical Built-In Self-Test (LBIST) feature to verify functionality of

the logic block in the FS5600.

LBIST can be disabled by setting the OTP_LBIST_DIS[7:0] to 0b0011_0110.

LBIST is enabled for all other values of OTP_LBIST_DIS[7:0]. If LBIST is disabled via

OTP, the following conditions should be valid for LBIST to be truly disabled:

• No boot error (from OTP controller)

• No CRC error (from OTP controller)

• No ECC error (from OTP controller)

If one of these conditions are not satisfied LBIST is enabled. LBIST_PASS bit in the I2C

map is set when LBIST is completed successfully and passes.

17.12.4 VCC and VDIG monitoring

VCC and VDIG voltages are monitored for over and under voltage faults. The part is

powered down if any of these faults is detected. See the state transition table for specific

transitions.

FS5600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 2 August 2022

53 / 111

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