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MFS5600AMMA7ES датащи(PDF) 45 Page - NXP Semiconductors |
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MFS5600AMMA7ES датащи(HTML) 45 Page - NXP Semiconductors |
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45 / 111 page ![]() NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer The polarity of the fault signals is configurable using FCCU12_FLT_POL register: • When FCCU12_FLT_POL = 0, FCCU1 = 0 or FCCU2 = 1 is a fault • When FCCU12_FLT_POL = 1, FCCU1 = 1 or FCCU2 = 0 is a fault The FS0B is asserted when an FCCU fault is detected and the state machine returns to INIT_RUN state. It is possible to program the PGOOD1 and PGOOD2 pins to also toggle during an FCCU fault if they are programmed to do so via OTP. PGOOD1/2 may be used to assert RESET of the MCU in this case. See Section 17.6 on PGOOD for details. 17.4.2 Single/independent FCCU monitoring When FCCU12_BISTABLE = 0, FCCU1 and FCCU2 may be used for independent signal monitoring. Either or both FCCU pins may be used in this configuration. For FCCU1/2 the polarity of the fault signal is configurable using FCCU1/2_FLT_POL register: • When FCCUx_FLT_POL = 0, LOW level on FCCUx is a fault • When FCCUx_FLT_POL = 1, HIGH-level on FCCUx is a fault The FS0B pin is asserted when an FCCU fault is detected and the state machine returns to INIT_RUN state. It is possible to program the PGOOD1 and PGOOD2 pins also to assert during an FCCU fault. PGOOD1/2 may be used to assert RESET of the MCU in this case. 17.4.3 FCCU status reporting via interrupt register The FCCU12_ERR bit is set high when an error in FCCU12 (bi-stable) is detected. FCCU1_ERR bit is set high when an error in FCCU1 is detected. FCCU2_ERR bit is set high when an error in FCCU2 is detected. Table 43 summarizes the error scenarios for FCCU1/2. FCCU1/2FLT_POL FCCU1 pin FCCU2 pin Status 0 0 0 Error 0 0 1 Error 0 1 0 No Error 0 1 1 Error 1 0 0 Error 1 0 1 No Error 1 1 0 Error 1 1 1 Error Table 43. FCCU1/2 status reporting error scenarios 17.5 External signal monitoring using ERRMON GPIO1 and GPIO3 may be configured as ERRMON1 and ERRMON2 by setting OTP_GPIO1_CFG[1:0] = 0b10 and OTP_GPIO3_CFG[1:0] = 0b10 respectively. When FS5600 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 3 — 2 August 2022 45 / 111 |
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