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STM32H753II датащи(PDF) 186 Page - STMicroelectronics |
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STM32H753II датащи(HTML) 186 Page - STMicroelectronics |
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186 / 361 page ![]() Electrical characteristics (rev Y) STM32H753xI 186/360 DS12117 Rev 8 6.3.30 LCD-TFT controller (LTDC) characteristics Unless otherwise specified, the parameters given in Table 101 for LCD-TFT are derived from tests performed under the ambient temperature, frcc_c_ck frequency and VDD supply voltage summarized in Table 23: General operating conditions, with the following configuration: • LCD_CLK polarity: high • LCD_DE polarity: low • LCD_VSYNC and LCD_HSYNC polarity: high • Pixel formats: 24 bits • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C=30 pF • Measurement points are done at CMOS levels: 0.5VDD • I/O compensation cell enabled Table 101. LTDC characteristics (1) Symbol Parameter Conditions Min Max Unit fCLK LTDC clock output frequency 2.7 V < VDD < 3.6 V, 20 pF -150 MHz 2.7 V < VDD < 3.6 V - 133 1.62 V < VDD < 3.6 V - 90 DCLK LTDC clock output duty cycle - 45 55 % tw(CLKH), tw(CLKL) Clock High time, low time tw(CLK)/2−0.5 tw(CLK)/2+0.5 ns tv(DATA) Data output valid time - 0.5 th(DATA) Data output hold time 0 - tv(HSYNC), tv(VSYNC), tv(DE) HSYNC/VSYNC/DE output valid time -0.5 th(HSYNC), th(VSYNC), th(DE) HSYNC/VSYNC/DE output hold time 0.5 - 1. Guaranteed by characterization results. |
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