STM32H753II datasheet(28/361 Pages) STMICROELECTRONICS

28 / 361 page

Functional overview

STM32H753xI

28/360

DS12117 Rev 8

3.5.3

Voltage regulator

The same voltage regulator supplies the 3 power domains (D1, D2 and D3). D1 and D2 can

be independently switched off.

Voltage regulator output can be adjusted according to application needs through 6 power

supply levels:

•

Run mode (VOS0 to VOS3)

–

Scale 0: boosted performance (available only with LDO regulator)

–

Scale 1: high performance

–

Scale 2: medium performance and consumption

–

Scale 3: optimized performance and low-power consumption

•

Stop mode (SVOS3 to SVOS5)

–

Scale 3: peripheral with wakeup from Stop mode capabilities (UART, SPI, I2C,

LPTIM) are operational

–

Scale 4 and 5 where the peripheral with wakeup from Stop mode is disabled

The peripheral functionality is disabled but wakeup from Stop mode is possible

through GPIO or asynchronous interrupt.

3.6

Low-power strategy

There are several ways to reduce power consumption on STM32H753xI:

•

Decrease the dynamic power consumption by slowing down the system clocks even in

Run mode and by individually clock gating the peripherals that are not used.

•

Save power consumption when the CPU is idle, by selecting among the available low-

power mode according to the user application needs. This allows achieving the best

compromise between short startup time, low-power consumption, as well as available

wakeup sources.

The devices feature several low-power modes:

•

CSleep (CPU clock stopped)

•

CStop (CPU sub-system clock stopped)

•

DStop (Domain bus matrix clock stopped)

•

Stop (System clock stopped)

•

DStandby (Domain powered down)

•

Standby (System powered down)

CSleep and CStop low-power modes are entered by the MCU when executing the WFI

(Wait for Interrupt) or WFE (Wait for Event) instructions, or when the SLEEPONEXIT bit of

the Cortex®-Mx core is set after returning from an interrupt service routine.

A domain can enter low-power mode (DStop or DStandby) when the processor, its

subsystem and the peripherals allocated in the domain enter low-power mode.

If part of the domain is not in low-power mode, the domain remains in the current mode.

Finally the system can enter Stop or Standby when all EXTI wakeup sources are cleared

and the power domains are in DStop or DStandby mode.

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