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LT8350RVPBF датащи(PDF) 14 Page - Analog Devices |
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LT8350RVPBF датащи(HTML) 14 Page - Analog Devices |
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14 / 24 page ![]() LT8350 14 Rev. 0 For more information www.analog.com OPERATION up from ground. From the time of entering enable mode to the time of VREF passing its rising UVLO threshold (1.89V typical), the LT8350 is going through a power-on-reset (POR), waking up the entire internal control circuitry and settling to the right initial conditions. After the POR, the LT8350 is ready and waiting for the signals on the CTRL and LOADEN pins to start switching. Start-Up and Fault Protection Figure 8 shows the start-up and fault sequence for the LT8350. During the POR state, the SS pin is hard pulled down with a 130Ω to ground. In a pre-biased condition, the SS pin has to be pulled below 0.2V to enter the INIT state, where the LT8350 waits 10µs so that the SS pin can be fully discharged to ground. After the 10µs, the LT8350 enters the UP/PRE state when the LOADON signal goes high. The LOADON high signal happens when CTRL pin is above its CTRL OFF thresholds (0.225V typical) and the LOADEN is high. During the UP/PRE state, the SS pin is charged up by a 12.5µA pull-up current while the switching is disabled and the LOADTG is turned off. Once the SS pin is charged above 0.25V, the LT8350 enters the UP/TRY state, where the LOADTG is turned on first while the switching is still disabled. If an excessive current flowing through the current sense resistor triggers the ISP/ISN over current (ISOC) signal, it will reset the LT8350 back into the POR state. After 10µs in the UP/TRY state without triggering the ISOC signal, the LT8350 enters the UP/RUN state. During the UP/RUN state, the switching is enabled and the start-up of the output voltage VOUT is controlled by the voltage on the SS pin. When the SS pin voltage is less than 1V, the LT8350 regulates the FB pin voltage to the SS pin voltage instead of the 1V reference. This allows the SS pin to be used to program soft-start by connecting an external capacitor from the SS pin to GND. The internal 12.5µA pull-up current charges up the capacitor, creating a voltage ramp on the SS pin. As the SS pin voltage rises region, switch D is turned off whenever the boost reverse current threshold is triggered during (A+D) phase, and both switches B and D are turned off whenever the buck reverse current threshold is triggered during (B+D) phase. As the load becomes lower and lower, or when a smaller value inductor is used and the inductor current ripple is bigger, the LT8350 may run in pulse-skipping mode, where the switches are held off for multiple cycles (i.e., skipping pulses) to maintain the regulation. Internal Charge Path Each of the two high side gate drivers is biased from its floating bootstrap capacitor CBST1 and CBST2, which is normally recharged by INTVCC through the integrated bootstrap diode D1 and D2 when the bottom power switches are turned on. When the LT8350 operates exclu- sively in the buck or boost regions, one of the top power switches is constantly on. Internal charge paths, from VOUT and BST2 to BST1, or from VIN and BST1 to BST2, charge the bootstrap capacitors to above 3.3V so that the top power switch can be kept on. Shutdown and Power-On-Reset The LT8350 enters shutdown mode and drains less than 2µA (typical) quiescent current when the EN/UVLO pin is below its shutdown threshold (0.3V minimum). Once the EN/UVLO pin is above its shutdown threshold (0.9V maxi- mum), the LT8350 wakes up startup circuitry, generates bandgap reference, and powers up the internal INTVCC LDO. The INTVCC LDO supplies the internal control cir- cuitry and gate drivers. Now the LT8350 enters under- voltage lockout (UVLO) mode with a hysteresis current (2.5µA typical) pulled into the EN/UVLO pin. When the INTVCC pin is charged above its rising UVLO threshold (2.52V typical), and the EN/UVLO pin passes its rising enable threshold (1.235V typical), and the junction tem- perature is less than its thermal shutdown (165°C typical), the LT8350 enters enable mode, in which the EN/UVLO hysteresis current is turned off and VREF is being charged |
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