SCY99080CDWR2G datasheet(18/27 Pages) ONSEMI

18 / 27 page

DDA002C

http://onsemi.com

The selection of the three setting resistors (Fmax, Fmin and

deadtime) require the usage of the selection charts displayed

below:

100

150

200

300

350

400

Figure 38. Maximum Switching Frequency

Resistor Selection Depending on the Adopted

Minimum Switching Frequency

RFmax (kW)

250

450

500

Fmin = 200 kHz

Fmin = 30 kHz

Figure 39. Minimum Switching Frequency Resistor

Selection (Fmin = 20 kHz to 100 kHz)

100

120

RFmin (kW)

140

100

Figure 40. Minimum Switching Frequency Resistor

Selection (Fmin = 100 kHz to 500 kHz)

100

150

200

250

300

350

400

RFmin (kW)

450

500

200

400

600

800

1000

1200

1400

1600

1800

2000

2131

5161

Figure 41. Deadtime Resistor Selection

Rdt (kW)

Deadtime Control

Deadtime control is an absolute necessity when the

half−bridge configuration comes into play. The deadtime

technique consists of including a time period during which

both high and low side switches are off. Of course, the

deadtime amount should be different depending on the

switching frequency, hence the ability to adjust it on this

controller. The option ranges between 100 ns and 2

ms. The

deadtime is actually made by the internal timer which is a

part of the VCO. Please refer to Figures 35 and 37 for more

details. During the Ct_DT capacitor charge time, the internal

latch is set and invalidates the AND gates: all outputs are

low. When the comparator goes back to the low level, A and

B outputs are validated, while the timing capacitor Ct_T_On

recharges. By connecting a resistor RDT to the ground, it

creates a current whose image serves to charge the Ct_DT

capacitor − we control the deadtime. It typically ranges

between 100 ns (RDT = 2.7 kW) and 2 ms (RDT = 70 kW).

100 ms PFC Timer

The DDA002C device features an internal digital timer

that prolongs the device start by 100 ms after the controller

is enabled by Vccon and/or a BO event. This fixed delay

allows the PFC stage to fully stabilize the bulk voltage

before the resonant power stage is activated. The PFC delay

also occurs when the EN2 input is released.

Adjustable Preheat Period − CIG Timer

As this IC is tailored not only for the resonant SMPS

applications but also to drive HCFL lamp ballasts, it

includes an adjustable preheat timer that allows the designer

to accurately setup needed filament preheat time. The timer

uses an external capacitor (Cpreheat) that is charged from an

internal current source (CIG_I). The IC outputs are forced

(via VCO) to operate at the frequency that is given by the

parallel combination of resistors Rfmin and Rfstart until the

Cpreheat capacitor voltage reaches 5 V. Figure 42 shows the

internal arrangement of the GIC timer.

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