SCY99080CDWR2G datasheet(15/27 Pages) ONSEMI

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DDA002C

http://onsemi.com

Application Information

The DDA002C includes all necessary features that help

building a rugged and safe switch−mode power converter

for an LCD TV backlighting or LLC resonant SMPS

applications. The bullets below detail the benefits brought

by implementing the DDA002C controller:

• High−voltage drivers: thanks to the ON Semiconductor

proprietary technology, the DDA002C controller can

directly drive the upper−side transistor of a half−bridge

configuration biased up to 600 V.

• Wide frequency range: a high−speed Voltage Control

Oscillator allows operating frequency excursion from

30 kHz up to 500 kHz on the Lgd and Hgd outputs,

with a 50% duty−cycle. These two outputs are available

as synchronization signals via two ground−referenced

low−current outputs (Lgs and Hgs).

• Internal skip comparator: all drivers are disabled

when feedback voltage goes below 1.2 V level. The

skip comparator includes 50 mV hysteresis.

• PFC−delay: the controller includes a fixed 100 ms

delay to allow bulk voltage stabilization after the PFC

stage has been started. The PFC timer is reset at

power−on, when a brown−out condition occurs and

when the EN2 input is released. The controller is ready

(VREF is OK) but no pulses are delivered by the

outputs during this delay period.

• Pre−heat period: once the PFC delay has elapsed, the

circuit starts to pulse with start up frequency to

pre−heat the lamps (in HCFL ballast applications). This

period is also called CIG period.

• Adjustable soft−start: at the end of the pre−heat

period, the soft−start sequence takes place. The

controller starts pulsing with Fstart and reduces its

frequency down to Fmin. The feedback loop is supposed

to take over during this period. The Fstart frequency is

dictated by the parallel combination of Rfstart and Rfmin

resistors, the soft−start length is given by a capacitor

connected to the ground. The soft−start sequence is

activated after every controller restart.

• Open−Loop detection: the controller starts to monitor

the feedback voltage at the end of the soft−start period.

If it remains stuck above 6 V (it means the feedback

loop is not closed) the internal timer starts the

countdown. The controller latches off if this situation

lasts longer than 50 ms.

• Adjustable dead−time: using a single resistor wired to

the ground, the user has ability to include needed

dead−time that helps to fight cross−conduction between

the upper and lower bridge transistors.

• Adjustable minimum and maximum frequency

excursion: in resonant applications, it is important to

stay away from the resonating peak to keep the

converter operating in the right region (ZVS). It is also

needed, for ballast applications, to keep the Fmin

accuracy high since it dictates maximum lamp power.

Thanks to a single external resistor, the designer can

program its lowest frequency point, obtained due to a

lack of feedback voltage (during the startup sequence or

in short−circuit conditions). Internally trimmed

capacitor offers a

±3.3 % precision on the selection of

the minimum switching frequency. The adjustable

upper frequency limit is less precise (

±10%).

• Low startup current: the device requires only 300 mA

start−up current. This feature decreases the power

dissipation and/or shortening of the start−up time when

the controller is powered from an auxiliary winding and

starts using a startup resistor connected directly to the

bulk voltage.

• Brown−Out detection: the IC incorporates a brown out

comparator, which prevents the outputs from switching

in case the high−voltage rail is not within the right

boundaries. The turn on and off levels of the bulk

voltage can be adjusted independently thanks to the

internal current sink IBO.

• Enable1 input: when a voltage above 1 V is applied to

this pin, for a time longer than 50

ms, the controller

permanently latches−off. The latch resets when Vcc is

cycled below Vcc(min) or when there is a brown−out

event detected. The EN1 input is blanked during the

PFC delay and preheat periods.

• Enable2 input: when a voltage higher than 1 V is

applied to this pin, the controller immediately stops all

pulses. The controller restores operation (including

PFC delay, preheat and soft−start) when enable 2 input

voltage decreases down again.

• OTP latch input: by connecting an NTC resistor

between ground and the OTP_latch input, the designer

has ability to latch−off the controller in an

over−temperature condition. The OTP input is blanked

during the PFC delay, preheat and soft−start periods.

• Synchronization outputs: two low−current ground

referenced outputs (Lgs and Hgs) are available to

implement a full−bridge converter in higher power

configurations. A resistor connected to the Dgs pin sets

the maximum allowable on−time that is delivered by

these two outputs when used for synchronization

purpose.

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