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FUSB3317 датащи(PDF) 12 Page - ON Semiconductor |
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FUSB3317 датащи(HTML) 12 Page - ON Semiconductor |
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12 / 16 page ![]() FUSB3317 www.onsemi.com 12 Figure 9. Protection Block Diagram Buck or Buck−Boost PWM Control + − VBUS VBAT CC2 VBUS Protection Block Enable Block Discharge DISC DC_EN 9RVIN RVIN EN PWM V1 OVP/UVP E_OTP/I_OTP/OCP CC_OVP/D_OVP CC1 CC2 VDD VDD DC_EN DC_EN pin is to disable/enable the external VBUS supply IC like DC−DC converter. So, DC_EN connects to Enable pin of DC−DC converter. To minimize the current consumption of DC−DC converter while Sink is not plugged in, FUSB3317 turns off the DC−DC until sink device attaches. Once Sink attaches, FUSB3317 detects the CC attach and enables DC_EN to High after 100msec of CC debounce to supply VBUS. Also the CATH pin controls the VBUS to 5 V default along with the DC_EN The initial VBUS will be 5 Volt by default feedback and the voltage can be changed following PD contract over CATH. DC_EN is controlled to Low with sink detach or device reset by POR or protection mode from OVP/OCP/OTP. DON and USB2.0 Data Lines The USB 2.0 Data Lines, D+ and D−, can be externally connected together via a 100 ohms resistor to provide the maximum power, a legacy USB device can take, which is 1.5 A per USB Battery Charging v1.2 (BC1.2) specification. This will usually be the case when a USB−C to micro−B cable is plugged into this design where this adapter cable has the required Sink Rd resistors within it to allow the FUSB3317 to recognize a Type C attach and to source 5 V on VBUS. The Sink will go through BC1.2 steps of primary and secondary detection to detect a Dedicated Charging Port (DCP) via this resistor connection of D+ and D− and takes 1.5 A maximum from VBUS. Internally, FUSB3317 presents BC1.2 Charging Downstream Port(CDP) mode in default to provide the 1.5 A of power as well as to make USB signal path connection between USB PHY, Head unit in automotive application and sink device. Since USB data, D+, D−, path have to connect from Sink to FUSB3317 as well as head unit, there should be 2:1 switch mux externally. DON pin of FUSB3317 can control the external switch enable or switch direction control. Below diagram is the example of using external switch, NIV1241, which has signal switch and TVS diodes on D+ and D− for ESD protection. Figure 10. DON Pin Connection to NIV1241 With sink attach, the FUSB3317 controls the DON pin High to close the USB D+/D− signals between head unit and the attached sink. DON pin is controlled to High about 900 ms after CC debounce and stayed high until sink device is plugged out. DON pin controls to Low with sink detach or device reset by POR or protection mode from OVP/OCP/OTP. BATUV BATUV pin monitors VBAT, battery voltage, to know if the voltage is low enough to send a new PD message to scale down the negotiated source power data object. The pin can be left float or either resistor divide input of VBAT. When the BATUV is float, if VBAT is below VBAT_UVP, max 5.9 V, or when the BATUV is resistor divide of VBAT and then if the BATUV drops below, VBAT_TH, 0.6 Volt, the new PD message will be sent to sink to renegotiate. In both cases, the 2 ms debounce time, tVBATUV_DEB, is applied before sending scale down message. The scaled down PDP(Power Delivery Power) by VBAT UVP will be 75% of the max PDP. For example, at 60 W PDP default, it will change to 45 W by VBAT UVP. Once VBAT UVP is recovered, it will come back to 60 W. NTC NTC pin is to detect external temperature on the board. NTC will connect to a thermistor which can be placed in the hottest place on the PCB, it could be next to NFET or close to the USB−C connector. Once NTC temperature rises to warning range which is 90 °C, the scale down PDP will be sent to sink so that the sink will pull less current/power. The scale is the same as VBAT UVP, 75%. If the NTC detects above shut down temperature, 100 °C, FUSB3317 enters fault protection mode and VBUS FET will be shut off and Sink will be disconnected. The new PDP table is below in case of either VBAT UVP or NTC. The PDP scaling minimum is 25% of PDP and PDP scaling default is 75%. VBAT−UVP NTC Warning Resultant_PDP Yes No PDP_scaling*Current_PDP No Yes PDP_scaling*Current_PDP Yes Yes PDP_scaling minimum *Current_PDP No No Current_PDP |
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