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PCF8545ATT датащи(PDF) 9 Page - NXP Semiconductors |
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PCF8545ATT датащи(HTML) 9 Page - NXP Semiconductors |
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9 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 PCF8545 to the other. Backplane swapping is sometimes desirable to aid with the routing of PCBs that do not use multiple layers. The BPS bit has to be set to the required value before enabling the display. Failure to do so does not damage the PCF8545 or the display, however unexpected display content may appear. BP0 BP1 BP2 BP3 BP4/S43 BP5/S42 BP6/S41 S39 BP7/S40 S38 S20 S37 S21 S36 S22 S35 S23 S34 S24 S33 S25 S32 S26 S31 S27 S30 S28 S29 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 39 38 37 36 35 34 33 32 31 30 29 S32 S33 S34 S35 S36 S37 S38 BP0 S39 BP1 S20 BP2 S21 BP3 S22 BP4/S43 S23 BP5/S42 S24 BP6/S41 S25 BP7/S40 S26 S31 S27 S30 S28 S29 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 39 38 37 36 35 34 33 32 31 30 29 BPS = 0 BPS = 1 013aaa432 Figure 5. Effect of backplane swapping 7.1.3.2 Line inversion (driving scheme A) and frame inversion (driving scheme B) The DC offset of the voltage across the LCD is compensated over a certain period: line- wise in line inversion mode (driving scheme A) or frame-wise in frame inversion mode (driving scheme B). With the INV bit (see Table 7), the compensation mode can be switched. In frame inversion mode, the DC value is compensated across two frames and not within one frame. Changing the inversion mode to frame inversion reduces the power consumption; therefore it is useful when power consumption is a key point in the application. Frame inversion may not be suitable for all applications. The RMS voltage across a segment is better defined; however, since the switching frequency is reduced, there is possibility for flicker to occur. The waveforms of Figure 14 to Figure 17 are showing line inversion mode. Figure 18 shows an example of frame inversion. 7.1.3.3 Power-down mode The power-down bit (PD) allows the PCF8545 to be put in a minimum power configuration. To avoid display artifacts, enter power-down only after the display has been switched off by setting bit E to logic 0. During power-down, the internal oscillator is switched off. PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 9 / 68 |
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