STM32WB10CC datasheet(23/110 Pages) STMICROELECTRONICS

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DS13259 Rev 2

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STM32WB10CC

Functional overview

3.7.2

Linear voltage regulator

Three embedded linear voltage regulators supply most of the digital and RF circuitries, the

main regulator (MR), the low-power regulator (LPR) and the RF regulator (RFR).



The MR is used in the Run and Sleep modes and in the Stop 0 mode.



The LPR is used in Low-Power Run, Low-Power Sleep and Stop 1 modes. It is also

used to supply the SRAMs in Standby with retention.



The RFR is used to supply the RF analog part, its activity is automatically managed by

the RF subsystem.

All the regulators are in power-down in Standby and Shutdown modes: the regulator output

is in high impedance, and the kernel circuitry is powered down, inducing zero consumption.

The ultralow-power STM32WB10CC supports dynamic voltage scaling to optimize its power

consumption in run mode. The voltage from the main regulator that supplies the logic

(VCORE) can be adjusted according to the system’s maximum operating frequency.

VCORE can also be supplied by the low-power regulator, the main regulator being switched

off. The system is then in Low-power run mode. In this case the CPU is running at up to

2 MHz, and peripherals with independent clock can be clocked by HSI16 (in this mode the

RF subsystem is not available).

3.7.3

Power supply supervisor

An integrated ultra-low-power brown-out reset (BOR) is active in all modes except

Shutdown ensuring proper operation after power-on and during power down. The device

remains in reset mode when the monitored supply voltage VDD is below a specified

threshold, without the need for an external reset circuit.

The lowest BOR level is 2.0 V at power on, and other higher thresholds can be selected

through option bytes.The device features an embedded programmable voltage detector

(PVD) that monitors the VDD power supply and compares it with the VPVD threshold. An

interrupt can be generated when VDD drops below the VPVD threshold and/or when VDD is

higher than the VPVD threshold. The interrupt service routine can then generate a warning

message and/or put the MCU into a safe state. The PVD is enabled by software.

3.7.4

Low-power modes

This ultra-low-power device supports several low-power modes to achieve the best

compromise between low-power consumption, short startup time, available peripherals and

available wakeup sources.

By default, the microcontroller is in Run mode, after a system or a power on Reset. It is up to

the user to select one of the low-power modes described below:



Sleep

In Sleep mode, only the CPU1 is stopped. All peripherals, including the RF subsystem,

continue to operate and can wake up the CPU when an interrupt/event occurs.



Low-power run

This mode is achieved with VCORE supplied by the low-power regulator to minimize

the regulator operating current. The code can be executed from SRAM or from the

Flash memory, and the CPU1 frequency is limited to 2 MHz. The peripherals with

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