1.4

Software Library

The firmware (without the boot section), GUI, and API is available on Microchip’s software library https://

www.microchip.com/doclisting/SoftwareLib.aspx.

1.5

SPI Communication

The PD69208T4, PD69204T4, and PD69208M managers use SPI communication in SPI slave mode to communicate

with the various controllers. Each manager has an address determined by ADDR0-ADDR3 pins. Each controller can

support up to 12 ICs at addresses 0–11. The actual frequency between PD69200 and PD6920x ICs is 1 MHz.

The following table lists the SPI communication packet structure.

Table 1-1. SPI Communication – Packet Structure

Control Byte

Selects PD69208T4

According to

Address

R/W Bit

Internal Register

Address

Number of Words

(Read Access Only)

Data Written to IC

(Write Access Only)

Read from IC (Read

Access Only)

8 bits

R(0)/W(1)

8 bits

8 bits

16 bits

See the PD69208T4, PD69204T4, and PD69208M Manager datasheet for additional details on the SPI interface.

1.6

UART

A pull-up resistor is required on the UART communication line. For more information, see AN3361 Designing an

IEEE802.3af/at/bt PoE System Based on PD692x0/PD69208.

Following is the UART communications configuration setting details:

• Bits per second: 19,200 bps

• Data bits: 8

• Parity: None

• Stop bits: 1

• Flow control: None

1.7

• Address: 7 bits

• Clockstretch: host should support

• Transaction: 15 bytes or 1 byte

PD69200

Architecture

Datasheet

DS00003460A-page 5