LTC4232 datasheet(14/18 Pages) AD

14 / 18 page

LT4200

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

Design Example

Consider the following design example (Figure 5):

TA = 25°C, VIN = 12V, IMAX = 50A. IINRUSH = 700mA,

CL = 2000µF, VUV = 9.88V, VOV = 15.2V, VPG = 10.5V.

A current limit fault triggers an automatic restart of the

power-up sequence.

ADC

226k

1µF

20k

12V

4200 F05

68nF

2000µF

VOUT

12V

50A

VDD

Z1*

OUT

GND

IMON

RMON

20k

LT4200

INTVCC

TIMER

SENSE+

FLT#

140k

20k

10k

20k

150k

UV = 9.88V

OV = 15.2V

PG = 10.5V

*TVS Z1: DIODES INC. SMCJ15A

PINS NOT USED IN THIS CIRCUIT:

GATE, ISET

Figure 5. 50A, 12V Card Resident Application

The inrush current is defined by the current required

to charge the output capacitor using the fixed 0.35V/

ms GATE charge up rate. The inrush current is defined

by Equation 8.

IINRUSH =CL •

0.35V

⎛

⎝⎜

⎞

⎠⎟ =

2000µF •

0.35V

⎛

⎝⎜

⎞

⎠⎟ =

700mA

(8)

As mentioned previously the charge-up time is the out-

put voltage (12V) divided by the output rate of 0.35V/ms

resulting in 34ms. The average power dissipation of 12V

at 700mA (or 4.2W) must not exceed the SOA of the pass

MOSFET for 34ms. This works out to be 0.774W√s, since

the MOSFET sees a VDS ramp of 0V to 12V. This is below

the LT4200 P√t spec of 7.5W√s.

Next the power dissipated in the MOSFET during overcur-

rent must be limited. The active current limit uses a timer

to prevent excessive energy dissipation in the MOSFET.

The worst-case power dissipation occurs when the volt-

age versus current profile of the foldback current limit is at

the maximum. This occurs when the current is 53.2A and

the FB voltage is 1V, VOUT = 8.5V and MOSFET VDS = 3.5V.

See the Current Limit Threshold Foldback in the Typical

Performance Characteristics section to view this profile.

In order to survive 186W, the MOSFET SOA dictates a

maximum current limit timeout.

TJ is calculated with Equation 9 from the ambient tem-

perature, package thermal impedance (θJA) and the

I2R heating.

TJ = (θJA • I2 • RON) + TA = 12°C/W •

(50A)2 • 2.2mΩ + 25°C = 91°C

(9)

The maximum current limit timeout is calculated from the

P√t constant and the 186W dissipated in current limit as

shown in Equation 10.

P t

= 7.5W s

tMAX =

7.5W s

⎛

⎝⎜

⎞

⎠⎟

tMAX =

7.5W s

186

⎛

⎝⎜

⎞

⎠⎟

tMAX = 1.63ms

(10)

Therefore, it is acceptable to set the current limit timeout

using CT to be 0.8ms (Equation 11).

CT =

0.8ms

12 ms/µF

[

]

= 68nF

(11)

To configure the LT4200 for auto retry after overcurrent

fault, connect the FLT# to the UV pin.

After the 0.8ms timeout the FLT# pin pulls down on the

UV pin restart the power-up sequence.

The resistive divider values for overvoltage (15.2V),

undervoltage (9.88V) and power good (10.5V) thresh-

olds can be calculated as follow: First, choose the bottom

resistors (R2, R4 and R6) to be 20k, this makes the resis-

tive divider draw 62μA of current if the input voltage is

near the threshold. The top resistor values are calculated

using Equation 12, Equation 13, and Equation 14.

=R2•

VOV

1.235V

−1

⎛

⎝⎜

⎞

⎠⎟ =

226k

(12)

LTC4232 датащи(PDF) 14 Page - Analog Devices

LTC4232 датащи(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

датащи скачать

ссылки URL