DLPC4420ZPC datasheet(29/49 Pages) TI

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an internal pull-down resistor and thus external pull-ups are used to modify the default test configuration. The

default configuration (x00) corresponds to the TSTPT_(7:0) outputs being driven low for reduce switching activity

during normal operation. For maximum flexibility, an option to jumper to an external pull-up is recommended

for TSTPT_(3:0). Note that adding pull-up to TSTPT_(7:4) may have adverse affects for normal operation and

are not recommended. Note that these external pull-ups are only sampled upon a zero to one transition on

POSENSE and thus changing their configuration after reset has been released does not have any effect until the

next time reset is asserted and released. Table 7-4 defines the test mode selection for 3 of the 16 programmable

scenarios defined by TSTPT_(3:0):

Table 7-4. Test Mode Selection

No Switching Activity

System Calibration

ARM Debug Signal Set

TSTPT(3:0) Capture Value

TSTPT(0)

Vertical Sync

ARM9_Debug (0)

TSTPT(1)

Delayed CW Index

ARM9_Debug (1)

TSTPT(2)

Sequence Index

ARM9_Debug (2)

TSTPT(3)

CW Spoke Test Pt

ARM9_Debug (3)

TSTPT(4)

CW Revolution Test Pt

ARM9_Debug (4)

TSTPT(5)

Reset Seq. Aux Bit 0

ARM9_Debug (5)

TSTPT(6)

Reset Seq. Aux Bit 1

ARM9_Debug (6)

TSTPT(7)

Reset Seq. Aux Bit 2

ARM9_Debug (7)

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DLPC4420

DLPS222 – DECEMBER 2021

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