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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STSPIN32G4 датащи(PDF) 20 Page - STMicroelectronics |
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STSPIN32G4 датащи(HTML) 20 Page - STMicroelectronics |
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20 / 48 page  Figure 14. Gate driver block diagram HS LS + - + - + + BOOTx GHSx OUTx GLSx SCREF x3 To control logic VM VCC VDSth VDSth VBOOT1 VCC A couple of digital inputs drive each half-bridge gate driver: one INLx signal for the low-side driving and one INHx signal for the high-side driving. High input implies the gate driver turns on the respective external MOSFET, with low value the gate driver turns it off. 5.2.1 Interlocking The gate driver provides interlocking function, so the high-side and low-side MOSFETs of the same half-bridge cannot be both on at the same time. Table 9. Gate driver control logic with interlocking INHx INLx High-side gate driver Low-side gate driver 0 0 Sink current (Turn-off) Sink current (Turn-off) 0 1 Sink current (Turn-off) Source current (Turn-on) 1 0 Source current (Turn-on) Sink current (Turn-off) 1 1 Sink current (Turn-off) Sink current (Turn-off) The interlocking function can be disabled setting the ILOCK bit. In this case both the high-side and low-side MOSFETs can be turned on at the same time. Table 10. Gate driver control logic without interlocking INHx INLx High-side gate driver Low-side gate driver 0 0 Sink current (Turn-off) Sink current (Turn-off) 0 1 Sink current (Turn-off) Source current (Turn-on) 1 0 Source current (Turn-on) Sink current (Turn-off) 1 1 Source current (Turn-on) Source current (Turn-on) STSPIN32G4 Gate drivers DS13630 - Rev 1 page 20/48 |
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