AM79C850 datasheet(16/97 Pages) AMD

16 / 97 page

AMD

P R E L I M I N A R Y

SUPERNET 3

QCTRL2

QCTRL1

QCTRL0

Indicated Status

(1) Quiescent.

(2) Space remains

for more data while

loading a transmit

queue

Unloading transmit

frame from Synchro-

nous Queue

Unloading transmit

frame from Asynchro-

nous Queue 0

Unloading transmit

frame from Asynchro-

nous Queue 1

Reserved

Current transmit frame

Underrun

Current transmit

queue full.

Current transmit

queue almost full

These signals communicate to the host the current

condition of the transmit queues. This provides useful

information for doing the host interface. The meaning of

these states are as follows:

A. QCTRL[2:0] = 000

The quiescent state exists when SUPERNET 3 is

neither transmitting nor receiving. This state is also true

while loading a transmit queue (making a write request

to a queue) and not yet unloading it, and when there is

space in the queue for more data.

B. QCTRL[2:0] = 001, 010 or 011

These states indicate unloading frame from the Syn-

chronous Queue, Asynchronous Queue 0 or Asynchro-

nous Queue 1, respectively. They are valid as long as

the corresponding queue is not yet in the almost full or

full state and, at the same time, the SUPERNET 3 is

reading out of the queue. The host can transfer more

data into the corresponding queue when any of these

states is present. These three combinations may

appear one BMCLK period later than the time indicated

in the timing diagram.

C. QCTRL[2:0] = 101

This state is present when all of the following three

conditions are satisfied:

1. The host has issued a write request for this queue

2. Transmit FIFO underrun occurs

3. Transmit buffer-memory underrun occurs for

this queue

D. QCTRL[2:0] = 110

When the transmit queue being requested is full, this

state is presented at the queue control signals. Note that

this state does not exist in SUPERNET 2, it is added in

SUPERNET 3.

E. QCTRL[2:0] = 111

This state means the number of free long words

remaining in the transmit queue which the current write

request is for has decreased to the almost-full value

(AFULL3-0) programmed in mode register 2. This signal

condition is asserted for one BMCLK cycle only as in the

FORMAC PLUS if the MENAFULL bit in the mode

for every cycle as long as the queue is in almost full

condition and it is not yet full.

Note: If AFULL3-0 is set to 000, this state is not pre-

sented, even when the transmit FIFO in buffer memory

is full.

RDATA1

Receive Data for Receive Queue #1

(TTL output, high impedance)

This signal indicates that received data is present in the

buffer memory and is ready to be transferred by the host

to system memory. Read requests are not acknowl-

edged when RDATA1 is inactive.

RDATA2

Receive Data for Receive Queue #2

(TTL output, high impedance)

This signal indicates that received data is present in the

buffer memory and is ready to be transferred by the host

to system memory. Read requests are not acknowl-

edged when RDATA2 is inactive.

Special Functions and Control Pins

(16 Pins)

FLXI

Flush/Inhibit (TTL input)

The SUPERNET 3 FLXI pin can be programmed to

perform either of two functions: it can provide a flush

received frame function for the chip or it can provide an

unconditional transmit-inhibit function.

If the FLUSH function is selected and the pin is asserted

by external logic, then the incoming frame is flushed.

The buffer memory pointers are not advanced from

where they were before the frame was received. This

prevents unwanted frames and fragments from occupy-

ing receive buffer space and taking up the buffer

memory bus bandwidth.

If the TRANSMIT INHIBIT function is selected and the

pin is asserted by external logic, then the SUPERNET 3

completes transmitting the current frame (if transmit-

ting) releases the token and no further transmissions

can occur until the pin is deasserted. During the time

that the TRANSMIT INHIBIT function is enabled, the

network timers and state machines operate normally.

AM79C850 датащи(PDF) 16 Page - Advanced Micro Devices

AM79C850 датащи(HTML) 16 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

датащи скачать

ссылки URL