56F8335 datasheet(69/160 Pages) FREESCALE

69 / 160 page

Introduction

56F8335 Technical Data, Rev. 1

Freescale Semiconductor

Preliminary

Part 5 Interrupt Controller (ITCN)

5.1 Introduction

The Interrupt Controller (ITCN) module is used to arbitrate between various interrupt requests (IRQs), to

signal to the 56800E core when an interrupt of sufficient priority exists, and to what address to jump in

order to service this interrupt.

5.2 Features

The ITCN module design includes these distinctive features:

•

Programmable priority levels for each IRQ

•

Two programmable Fast Interrupts

•

Notification to SIM module to restart clocks out of Wait and Stop modes

•

Drives initial address on the address bus after reset

For further information, see Table 4-5, Interrupt Vector Table Contents.

5.3 Functional Description

The Interrupt Controller is a slave on the IPBus. It contains registers allowing each of the 82 interrupt

sources to be set to one of four priority levels, excluding certain interrupts of fixed priority. Next, all of

the interrupt requests of a given level are priority encoded to determine the lowest numerical value of the

active interrupt requests for that level. Within a given priority level, 0 is the highest priority, while number

81 is the lowest.

5.3.1

Normal Interrupt Handling

Once the ITCN has determined that an interrupt is to be serviced and which interrupt has the highest

priority, an interrupt vector address is generated. Normal interrupt handling concatenates the VBA and the

vector number to determine the vector address. In this way, an offset is generated into the vector table for

each interrupt.

5.3.2

Interrupt Nesting

Interrupt exceptions may be nested to allow an IRQ of higher priority than the current exception to be

serviced. The following tables define the nesting requirements for each priority level.

Table 5-1 Interrupt Mask Bit Definition

SR[9]1

1. Core status register bits indicating current interrupt mask within the core.

SR[8]1

Permitted Exceptions

Masked Exceptions

Priorities 0, 1, 2, 3

None

Priorities 1, 2, 3

Priority 0

Priorities 2, 3

Priorities 0, 1

Priority 3

Priorities 0, 1, 2

56F8335 датащи(PDF) 69 Page - Freescale Semiconductor, Inc

56F8335 датащи(HTML) 69 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL