TUSB6250 datasheet(16/124 Pages) TI

16 / 124 page

Device Parameter Information

4−3

SLLS535A − January 2004

TUSB6250

Table 4−1. Controller Terminal Description (80-Pin TQFP) (Continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

TYPE

NOTES

DESCRIPTION

DGND

27,37,48,

56,66,75

GND

Digital circuit ground terminals. Each ground terminal should be directly connected through a

low impedance path to the ground plane.

DVDD

23,33,45,

53,63,77

PWR

3.3-V power supply terminals for the internal I/O circuitry. De-coupling and filtering capacitors

are required on these power supply terminals. See the TUSB6250 reference design document

for detailed information.

DVDD18

32, 76

PWR

1.8-V power supply for the internal digital circuitry of the TUSB6250. An internal voltage

regulator generates this supply voltage when terminal DVREGEN is asserted. When

DVREGEN is de-asserted, 1.8 V must be supplied externally. Bypass capacitors are required

on these pins to ground.

SUSPEND

(1)

Suspend status indication. This terminal is low during normal operation and active high during

suspend. It can be used for external logic power down operations.

ATA/ATAPI INTERFACE

CS1

(2)(9)

ATA/ATAPI: Drive chip select-1. Used to select the control block registers defined by the

ATA/ATAPI-5 specification. This terminal should be connected to the corresponding pin of the

ATA/ATAPI interface connector on the end product PCB.

CS0

(2)(9)

ATA/ATAPI: Drive chip select-0. Used to select the command block registers defined by the

ATA/ATAPI-5 specification. This terminal should be connected to the corresponding pin of the

ATA/ATAPI interface connector on the end product PCB.

DA [2:0]

28, 31,

(2)(9)

ATA/ATAPI: These three address lines are used to select the ATA/ATAPI drive registers as

defined by the ATA/ATAPI-5 specification. These terminals should be connected to the

corresponding pins of the ATA/ATAPI interface connector on the end product PCB.

DD [15:0]

41,43,46,

49,51,54,

57,59,60,

58,55,52,

50,47,44,

I/O

(2)(5)

(10)

ATA/ATAPI: 16-bit I/O data bus. These terminals are all 5-V fail-safe with internal controllable

pulldown resistors. These terminals should be connected to the corresponding pins of the

ATA/ATAPI interface connector on the end product PCB.

DMACK

(2)(9)

ATA/ATAPI: DMA acknowledge. This terminal should be connected to the corresponding pin of

the ATA/ATAPI interface connector on the end product PCB.

DMARQ

(5)(10)

ATA/ATAPI: DMA request. This 5-V fail-safe terminal has an internal controllable pulldown

resistor. The power-up default is the pulldown resistor enabled. This terminal should be

connected to the corresponding pin of the ATA/ATAPI interface connector on the end product

PCB.

DIOR

(2)(9)

ATA/ATAPI: Read strobe signal. This terminal should be connected to the corresponding pin of

the ATA/ATAPI interface connector on the end product PCB.

DIOW

(2)(9)

ATA/ATAPI: Write strobe signal. This terminal should be connected to the corresponding pin of

the ATA/ATAPI interface connector on the end product PCB.

INTRQ

(5)(9)

ATA/ATAPI: Interrupt request. The ATA device asserts this signal when it has a pending interrupt.

This 5-V fail-safe terminal has internal configurable pullup and pulldown resistors. The power-up

default is the pulldown resistor enabled. This terminal should be connected to the corresponding

pin of the ATA/ATAPI interface connector on the end product PCB.

IORDY

(5)(9)

ATA/ATAPI: Channel ready. This 5-V fail-safe terminal has internal configurable pullup and

pulldown resistors. The power-up default is the pullup resistor enabled. This terminal should be

connected to the corresponding pin of the ATA/ATAPI interface connector on the end product

PCB.

P3.6

I/O

(2)(5)

(9)

5-V fail-safe general-purpose I/O with internal configurable pullup and pulldown resistors. This

terminal can be used as a GPIO or PDIAG function to be implemented by the end product

developer’s custom firmware. After power-on reset, this terminal defaults as input with the

internal pullup resistor activated. The MCU can reconfigure the pullup and pulldown resistors,

if desired.

TUSB6250 датащи(PDF) 16 Page - Texas Instruments

TUSB6250 датащи(HTML) 16 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL