TUSB6250 datasheet(69/124 Pages) TI

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Miscellaneous and GPIO Configuration Registers

9−4

SLLS535A − January 2004

TUSB6250

9.3

PUPDWDN_P2: GPIO Pullup and Pulldown Resistor Power Down for Port 2

(XDATA at F08B)

The PUPDWDN_2 register allows the MCU to enable/disable both the internal pullup/pulldown resistors

connected to port 2 GPIO pins. To choose the desired pullup or pulldown resistor for a particular pin, the MCU

has to ensure the correct setup is done in the PUPDSLCT_P2 register before enabling the corresponding bit

in the PUPDWDN_2 register.

PUPDOFF [N] means the pullup/pulldown resistors disable or power down for the P2.N pin.

765

43210

PUOFF7

PUPDOFF6

PUPDOFF5

PUPDOFF4

RSV

PUPDOFF0

R/W

R/O

R/W

BIT

NAME

RESET

FUNCTION

PUPDOFF0

Port 2 GPIO pin P2.0 pullup and pulldown resistor power down configuration by the MCU.

S If the MCU sets this bit to 1, both the pullup and pulldown resistor are disabled on P2.0.

S If the MCU clears this bit to 0, either the pullup or pulldown resistor is enabled for P2.0 with

the selection is controlled by bit 0 of the PUPDSLCT_P2 register.

The power-up default is to enable the pullup/pulldown resistor for the P2.0 pin.

3−1

RSV

000b

Reserved

6−4

PUPDOFF [N]

(N = 4 to 6)

Port 2 GPIO pin P2.4–P2.6 pullup and pulldown resistor power down configuration by the MCU.

S If the MCU sets this bit to 1, both the pullup and pulldown resistor are disabled on pins

P2.4–P2.6.

S If the MCU clears this bit to 0, either the pullup or the pulldown resistor is enabled for

P2.4–P2.6, with the selection controlled by the corresponding bit of the PUPDSLCT_P2

The power-up default is to enable the pullup/pulldown cell for P2.4–P2.6 pins.

PUOFF7

Port 2 GPIO pin P2.7 pullup resistor configuration by the MCU.

S If the MCU sets this bit to 1, the pullup resistor is disconnected from pin P2.7.

S If the MCU clears this bit to 0, the pullup resistor is connected to pin P2.7.

The power-up default is to enable the pullup resistor on the P2.7 pin.

9.4

PUPDSLCT_P3: GPIO Pullup and Pulldown Resistor Selection Register for Port 3

(XDATA at F08C)

The PUPDSLCT_P3 register allows the MCU to select either the pullup or pulldown internal resistor to be

connected to the port 3 GPIO pins. To turn off both the pullup and pulldown resistors, the MCU has to configure

the corresponding bit in the PUPDPWDN_P3 register.

PUSEL [N] means the pullup/pulldown resistors selection for P3.N pin.

765

43210

PUSEL7

PUSEL6

PUSEL5

PUSEL4

PUSEL3

PUSEL2

RSV

R/W

R/O

BIT

NAME

RESET

FUNCTION

1−0

rsv

Reserved = 00

7−2

PUSEL [N]

(N = 2 to 7)

Port 3 GPIO pin P3.2–P3.7 pullup and pulldown resistor selection by the MCU.

S If the MCU sets this bit to 1, the pullup resistor is selected and the pulldown resistor is

deselected.

S If the MCU clears this bit to 0, the pulldown resistor is selected and the pullup resistor is

deselected.

The power-up default is the pullup resistor enabled and the pulldown resistor disabled for

pins P3.2–P3.7.

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