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DS2792 датащи(PDF) 19 Page - Maxim Integrated Products |
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DS2792 датащи(HTML) 19 Page - Maxim Integrated Products |
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19 / 40 page ![]() DS2792 Programmable Fuel Gauge with UART Interface 19 of 40 Table 6. Peripheral Register Reset Values REGISTER BIT NUMBER REGISTER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PO 0 0 1 1 1 1 1 1 PPU 0 0 0 0 0 1 0 0 PAF 0 0 0 0 0 1 0 0 EIC 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EINT 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CCCON 0 0 0 0 0 0 0 0 TC 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TTC 0 0 0 0 0 0 0 0 PI s s s s s s s s ICDT0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ICDT1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ICDC 0 0 0 0 0 0 0 0 ICDF 0 0 0 0 0 0 0 0 ICDB 0 0 0 0 0 0 0 0 ICDA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ICDD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINT 0 0 0 0 0 0 0 0 SMASK 0 0 0 0 0 0 0 0 SMD 0 0 0 0 0 0 0 0 SBUF 0 0 0 0 0 0 0 0 SCON 0 0 0 0 0 0 0 0 PR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SADEN 0 0 0 0 0 0 0 0 SADDR 0 0 0 0 0 0 0 0 BRE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Note: s indicates bit reflects pin state. ON-CHIP REGULATOR The DS2792 provides a regulated 3.3V output on the VB pin capable of supplying up to 2mA of current to external circuitry. The regulated supply can be used to level shift the I/O lines and/or provide a reference voltage for the Vx pin to measure a pack ID resistor or thermistor. The regulator output is always active regardless of the DS2792’s mode of operation. SYSTEM INTERRUPTS Multiple interrupt sources are available for quick response to internal and external events. The MAXQ20 architecture uses a single interrupt vector (IV), single interrupt-service routine (ISR) design. For maximum flexibility, interrupts can be enabled globally, individually, or by module. When an interrupt condition occurs, its individual flag is set, even if the interrupt source is disabled at the local, module, or global level. Interrupt flags must be cleared within the firmware-interrupt routine to avoid repeated interrupts from the same source. Application software must ensure a delay between the write to the flag and the RETI instruction to allow time for the interrupt hardware to remove the internal interrupt condition. Asynchronous interrupt flags require a one-instruction delay and synchronous interrupt flags require a two-instruction delay. When an enabled interrupt is detected, execution jumps to a user-programmable interrupt vector location. The IV register defaults to 0000h on reset or power-up, so if it is not changed to a different address, application firmware must determine whether a jump to 0000h came from a reset or interrupt source. Once control has been transferred to the ISR, the interrupt identification register (IIR) can be used to determine if a system register or peripheral register was the source of the interrupt. The specified module can then be interrogated for the specific interrupt source and software can take appropriate action. Interrupts are evaluated by application code allowing the definition of a unique interrupt priority scheme for each application. Interrupt sources are available from the watchdog timer described in the MAXQ Users Guide, the SINT register described in the UART Interrupts section, and the EINT register as shown in Figure 7. |
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