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AM79C978AVCW датащи(PDF) 87 Page - Advanced Micro Devices

номер детали AM79C978AVCW
подробное описание детали  Single-Chip 1/10 Mbps PCI Home Networking Controller
PDF  256 Pages
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производитель  AMD [Advanced Micro Devices]
домашняя страница  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C978AVCW датащи(HTML) 87 Page - Advanced Micro Devices

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Am79C978A
87
Figure 47.
OnNow Functional Diagram
Link Change Detect
Link change detect is one of wake-up events defined by
the OnNow specification. Link Change Detect mode is set
when the LCMODE bit (CSR116, bit 8) is set either by
software or loaded through the EEPROM.
When this bit is set, any change in the Link status will
cause the LCDET bit (CSR116, bit 9) to be set. When the
LCDET bit is set, the PME_STATUS bit (PMCSR register,
bit 15) will be set. If either the PME_EN bit (PMCSR, bit 8)
or the PME_EN_OVR bit (CSR116, bit 10) are set, then
the PME will also be asserted.
OnNow Pattern Match Mode
In th e O n No w P a tter n Ma tc h Mode , the
Am79C978A device compares the incoming pack-
ets with up to eight patterns stored in the Pattern
Match RAM (PMR). The stored patterns can be
compared with part or all of incoming packets, de-
pending on the pattern length and the way the PMR
is programmed. When a pattern match has been
detected, then PMAT bit (CSR116, bit 7) is set. The
setting of the PMAT bit causes the PME_STATUS
bit (PMCSR, bit 15) to be set, which in turn will as-
sert the PME pin if the PME_EN bit (PMCSR, bit 8)
is set.
Pattern Match RAM (PMR)
PMR is organized as an array of 64 words by 40
bits as s hown in Figure 48. T he PMR is pro-
grammed indirectly through BCRs 45, 46, and 47.
When BCR45 is written and the PMAT_MODE bit
(BCR45, bit 7) is set to 1, Pattern Match logic is
enabled. No bus accesses into the PMR are possi-
ble when the PMAT_MODE bit is set, and BCR46,
BCR47, and all other bits in BCR45 are ignored.
MPDETECT
MPPEN
PG
MPMODE
MPEN
Magic Packet
Link Change
LCMODE
Link Change
MPMAT
LCDET
S
R
Q
Q
DET
CLR
BCR47
BCR46
BCR45
S
R
Q
Q
SET
CLR
S
R
Q
Q
SET
CLR
S
R
Q
Q
SET
CLR
PMAT
Pattern Match
Input
Pattern
PME_STATUS
Pattern Match RAM (PMR)
PME Status
PME_EN
MPMAT
PME_EN_OVR
LCEVENT
PME
S
R
Q
Q
SET
CLR
POR
POR
H_RESET
POR
POR
22399A-50



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