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AT25SF321 датащи(PDF) 8 Page - Dialog Semiconductor |
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AT25SF321 датащи(HTML) 8 Page - Dialog Semiconductor |
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8 / 48 page ![]() 7 AT25SF321 DS-25SF321–047F–8/2017 Table 5-1. Command Listing Command Opcode Clock Frequency Address Bytes Dummy Bytes Data Bytes Section Link Read Commands Read Array 0Bh 0000 1011 Up to 85 MHz 3 1 1+ 6.1 03h 0000 0011 Up to 50 MHz 3 0 1+ Dual Output Read 3Bh 0011 1011 Up to 85 MHz 3 1 1+ 6.2 Dual I/O Read BBh 1011 1011 Up to 85 MHz 3 0 1+ 6.3 Quad Output Read 6Bh 0110 1011 Up to 85 MHz 3 1 1+ 6.4 Quad I/O Read EBh 1110 1011 Up to 85 MHz 3 1 1+ 6.5 Continuous Read Mode Reset - Dual FFFFh 1111 1111 1111 1111 Up to 104 MHz 0 0 0 6.6 Continuous Read Mode Reset - Quad FFh 1111 1111 Up to 104 MHz 0 0 0 6.6 Program and Erase Commands Block Erase (4 Kbytes) 20h 0010 0000 Up to 104 MHz 3 0 0 7.2 Block Erase (32 Kbytes) 52h 0101 0010 Up to 104 MHz 3 0 0 Block Erase (64 Kbytes) D8h 1101 1000 Up to 104MHz 3 0 0 Chip Erase 60h 0110 0000 Up to 104 MHz 0 0 0 7.3 C7h 1100 0111 Up to 104 MHz 0 0 0 Byte/Page Program (1 to 256 Bytes) 02h 0000 0010 Up to 104 MHz 3 0 1+ 7.1 Program/Erase Suspend 75h 0111 0101 Up to 104 MHz 0 0 0 7.4 Program/Erase Resume 7Ah 0111 1010 Up to 104 MHz 0 0 0 7.5 Protection Commands Write Enable 06h 0000 0110 Up to 104 MHz 0 0 0 8.1 Write Disable 04h 0000 0100 Up to 104 MHz 0 0 0 8.2 Security Commands Erase Security Register Page 44h 0100 0100 Up to 104 MHz 3 0 0 9.1 Program Security Register Page 42h 0100 0010 Up to 104 MHz 3 0 1+ 9.2 Read Security Register Page 48h 0100 1000 Up to 85MHz 3 1 1+ 9.3 Status Register Commands Read Status Register Byte 1 05h 0000 0101 Up to 104 MHz 0 0 1 10.1 Read Status Register Byte 2 35h 0011 0101 Up to 104 MHz 0 0 1 Write Status Register 01h 0000 0001 Up to 104 MHz 0 0 1 or 2 10.2 Write Enable for Volatile Status Register 50h 0101 0000 Up to 104MHz 0 0 0 10.3 |
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