DSPIC33EP128GS708 datasheet(64/484 Pages) MICROCHIP

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dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 64

 2016-2018 Microchip Technology Inc.

5.2

RTSP Operation

The dsPIC33EPXXXGS70X/80X family Flash program

memory array is organized into rows of 64 instructions

or 192 bytes. RTSP allows the user application to erase

a single page (8 rows or 512 instructions) of memory at

a time and to program one row at a time. It is possible

to program two instructions at a time as well.

The page erase and single row write blocks are

edge-aligned, from the beginning of program

memory, on boundaries of 1536 bytes and 192 bytes,

respectively. Figure 30-14 in Section 30.0 “Electrical

Characteristics” lists

the

typical

erase

and

programming times.

Row programming is performed by loading 192 bytes

into data memory and then loading the address of the

first byte in that row into the NVMSRCADR register.

Once the write has been initiated, the device will

automatically load the write latches and increment the

NVMSRCADR and the NVMADR(U) registers until

all bytes have been programmed. The RPDF bit

(NVMCON<9>) selects the format of the stored data in

RAM to be either compressed or uncompressed. See

Figure 5-2 for data formatting. Compressed data helps

to reduce the amount of required RAM by using the

upper byte of the second word for the MSB of the

second instruction.

The basic sequence for RTSP word programming is to

use the TBLWTL and TBLWTH instructions to load two of

the 24-bit instructions into the write latches found in

configuration memory space. Refer to Figure 4-1

through Figure 4-4 for write latch addresses. Program-

ming is performed by unlocking and setting the control

bits in the NVMCON register.

All erase and program operations may optionally use

the NVM interrupt to signal the successful completion

of the operation. For example, when performing Flash

write operations on the Inactive Partition in Dual

Partition mode, where the CPU remains running, it is

necessary to wait for the NVM interrupt before

programming the next block of Flash program memory.

FIGURE 5-2:

UNCOMPRESSED/

COMPRESSED FORMAT

5.3

Programming Operations

A complete programming sequence is necessary for

programming or erasing the internal Flash in RTSP

mode. The processor stalls (waits) until the program-

ming operation is finished. Setting the WR bit

(NVMCON<15>) starts the operation and the WR bit is

automatically cleared when the operation is finished.

5.3.1

PROGRAMMING ALGORITHM FOR

FLASH PROGRAM MEMORY

Programmers can program two adjacent words

(24 bits x 2) of Program Flash Memory at a time on

every other word address boundary (0x000000,

0x000004, 0x000008, etc.). To do this, it is necessary to

erase the page that contains the desired address of the

location the user wants to change. For protection against

accidental operations, the write initiate sequence for

NVMKEY must be used to allow any erase or program

operation to proceed. After the programming command

has been executed, the user application must wait for

the programming time until programming is complete.

The two instructions following the start of the

programming sequence should be NOPs.

MSB1

0x00

LSW2

LSW1

Even Byte

Address

MSB2

0x00

MSB1

MSB2

LSW2

LSW1

Even Byte

Address

UNCOMPRESSED FORMAT (RPDF = 0)

COMPRESSED FORMAT (RPDF = 1)

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