DSPIC33EP128GS708 datasheet(54/484 Pages) MICROCHIP

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dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 54

 2016-2018 Microchip Technology Inc.

4.5.2

EXTENDED X DATA SPACE

The lower portion of the base address space range,

between 0x0000 and 0x7FFF, is always accessible,

regardless of the contents of the Data Space Read

Page register. It is indirectly addressable through the

being located in the default EDS Page 0 (i.e., EDS

address range of 0x000000 to 0x007FFF with the base

address bit, EA<15> = 0, for this address range). How-

ever, Page 0 cannot be accessed through the upper

32 Kbytes, 0x8000 to 0xFFFF, of base Data Space in

combination with DSRPAG = 0x000. Consequently,

DSRPAG is initialized to 0x001 at Reset.

The remaining PSV pages are only accessible using

the DSRPAG register in combination with the upper

32 Kbytes, 0x8000 to 0xFFFF, of the base address,

where base address bit, EA<15> = 1.

4.5.3

SOFTWARE STACK

The W15 register serves as a dedicated Software

Stack Pointer (SSP), and is automatically modified by

exception processing, subroutine calls and returns;

however, W15 can be referenced by any instruction in

the same manner as all other W registers. This simpli-

fies reading, writing and manipulating the Stack Pointer

(for example, creating stack frames).

W15 is initialized to 0x1000 during all Resets. This

address ensures that the SSP points to valid RAM in all

dsPIC33EPXXXGS70X/80X devices and permits stack

availability for non-maskable trap exceptions. These can

occur before the SSP is initialized by the user software.

You can reprogram the SSP during initialization to any

location within Data Space.

The Software Stack Pointer always points to the first

available free word and fills the software stack, work-

ing from lower toward higher addresses. Figure 4-9

illustrates how it pre-decrements for a stack pop

(read) and post-increments for a stack push (writes).

When the PC is pushed onto the stack, PC<15:0> are

pushed onto the first available stack word, then

PC<22:16> are pushed into the second available stack

location. For a PC push during any CALL instruction,

the MSB of the PC is zero-extended before the push,

as shown in Figure 4-9. During exception processing,

the MSB of the PC is concatenated with the lower eight

bits of the CPU STATUS Register, SR. This allows the

contents of SRL to be preserved automatically during

interrupt processing.

FIGURE 4-9:

CALL STACK FRAME

Note 1: DSRPAG should not be used to access

Page 0. An EDS access with DSRPAG

set to 0x000 will generate an address

error trap.

2: Clearing the DSRPAG in software has no

effect.

Note:

To protect against misaligned stack

accesses, W15<0> is fixed to ‘0’ by the

hardware.

Note 1: To maintain system Stack Pointer (W15)

coherency, W15 is never subject to

(EDS) paging, and is therefore, restricted

to an address range of 0x0000 to

0xFFFF. The same applies to W14 when

used as a Stack Frame Pointer (SFA = 1).

2: As the stack can be placed in, and can

access X and Y spaces, care must be

taken regarding its use, particularly with

regard to local automatic variables in a C

development environment

PC<15:1>

b‘000000000’

W15 (before CALL)

W15 (after CALL)

0x0000

PC<22:16>

CALL SUBR

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