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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DSPIC33EP128GS708 датащи(PDF) 185 Page - Microchip Technology |
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DSPIC33EP128GS708 датащи(HTML) 185 Page - Microchip Technology |
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185 / 484 page  2016-2018 Microchip Technology Inc. DS70005258C-page 185 dsPIC33EPXXXGS70X/80X FAMILY bit 2-0 OCM<2:0>: Output Compare x Mode Select bits 111 = Center-Aligned PWM mode: Output is set high when OCxTMR = OCxR and set low when OCxTMR = OCxRS(1) 110 = Edge-Aligned PWM mode: Output is set high when OCxTMR = 0 and set low when OCxTMR = OCxR(1) 101 = Double Compare Continuous Pulse mode: Initializes OCx pin low, toggles OCx state continuously on alternate matches of OCxR and OCxRS 100 = Double Compare Single-Shot mode: Initializes OCx pin low, toggles OCx state on matches of OCxR and OCxRS for one cycle 011 = Single Compare mode: Compare event with OCxR, continuously toggles OCx pin 010 = Single Compare Single-Shot mode: Initializes OCx pin high, compare event with OCxR, forces OCx pin low 001 = Single Compare Single-Shot mode: Initializes OCx pin low, compare event with OCxR, forces OCx pin high 000 = Output compare channel is disabled REGISTER 15-1: OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1 (CONTINUED) Note 1: OCxR and OCxRS are double-buffered in PWM mode only. |
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