DS1925 datasheet(35/46 Pages) MAXIM

35 / 46 page

After the bus master has released the line it goes into

receive mode (Rx). Now the 1-Wire bus is pulled to VPUP

through the pullup resistor or, in case of a DS2490 driver,

by active circuitry. When the threshold VTH is crossed,

the DS1925 waits for tPDH and then transmits a presence

pulse by pulling the line low for tPDL. To detect a presence

pulse, the master must test the logical state of the 1-Wire

line at tMSP.

The tRSTH window must be at least the sum of tPDH-

MAX, tPDLMAX, and tRECMIN. Immediately after tRSTH is

expired, the DS1925 is ready for data communication. In

a mixed population network tRSTH should be extended to

minimum 480µs at standard speed and 48µs at overdrive

speed to accommodate other 1-Wire devices.

Read-/Write-Time Slots

Data communication with the DS1925 takes place in

time slots, which carry a single bit each. Write time slots

transport data from bus master to slave. Read time slots

transfer data from slave to master. The definitions of the

write and read time slots are illustrated in Figure 13.

All communication begins with the master pulling the data

line low. As the voltage on the 1-Wire line falls below

the threshold VTL, the DS1925 starts its internal timing

generator that determines when the data line is sampled

during a write time slot and how long data is valid during

a read time slot.

Master-to-Slave

For a

write-one time slot, the voltage on the data line

must have crossed the VTH threshold before the write-

one low time tW1LMAX is expired. For a write-zero time

slot, the voltage on the data line must stay below the

VTH threshold until the write-zero low time tW0LMIN is

expired. The voltage on the data line should not exceed

VILMAX during the entire tW0L or tW1L window. After the

VTH threshold has been crossed, the DS1925 needs a

recovery time tREC before it is ready for the next time slot.

Slave-to-Master

read-data time slot begins like a write-one time slot.

The voltage on the data line must remain below VTL until

the read low time tRL is expired. During the tRL window,

when responding with a 0, the DS1925 starts pulling the

data line low; its internal timing generator determines

when this pulldown ends and the voltage starts rising

again. When responding with a 1, the DS1925 does not

hold the data line low at all, and the voltage starts rising

as soon as tRL is over.

Figure 12. Initialization Procedure: Reset and Presence Pulse

DS1925

iButton High-Capacity Temperature Logger

with 122KB Data-Log Memory

www.maximintegrated.com

Maxim Integrated │ 35

VIHMASTER

MASTER RX “PRESENCE PULSE”

VPUP

VTH

VTL

VILMAX

tREC

tPDH

MASTER TX “RESET PULSE”

tRSTL

tPDL

tRSTH

tMSP

RESISTOR

MASTER

DS1925

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