ACE34AC04

4K I

VER 1.1

1

Description

The ACE34AC04 is a 1.7V rated minimum operating voltage Serial EEPROM device containing

4096-bits of Serially Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized

as 512-bytes of eight bits each. The Serial EEPROM operation is tailored specifically for DRAM memory

modules with Serial Presence Detect (SPD) to store a

module‟s vital product data such as the module‟s

size, speed, voltage, data width, and timing parameters. The ACE34AC04 is protocol compatible with the

legacy JEDEC EE1002 specification (2-Kbit) devices enabling the ACE34AC04 to be utilized in legacy

applications without any software changes. The device is designed to respond to specific software

commands that allow users to identify and set which half of the memory the internal address counter is

located. This special page addressing method to select the upper or lower half of the Serial EEPROM is

what facilitates legacy compatibility. However, there is one exception to the legacy compatibility as the

ACE34AC04 does not support the Permanent Write Protection feature. Additionally, the ACE34AC04

incorporates a Reversible Software Write Protection (RSWP) feature enabling the capability to selectively

write protect any or all of the four 128-byte quadrants. Once the RSWP is set, it can only be reversed by

sending a specific software command sequence. The ACE34AC04 supports the industry standard 2-wire

I2C Fast-Mode Plus (FM+) serial interface allowing device communication to operate at up to 1MHz. A

bus timeout feature is supported to help prevent system lock-ups. The ACE34AC04 is available in space

saving SOP, TSSOP, and UDFN packages.

Features



Low voltage and low power operations:

ACE34AC04: VCC = 1.7V to 3.6V, Industrial temperature range (-40℃ to 85℃).



Maximum Standby current < 1µA .



JEDEC JC42.4 (EE1004-v) Serial Presence Detect (SPD) Compliant



Individually reversible software write protection on all four 128-byte quadrants.



16 bytes page write mode.



Partial page write operation allowed.



Industy standard 100kHz, 400 kHz,and 1MHz I2C interface.



Schmitt trigger, filtered inputs for noise protection.



Self-timed programming cycle (5ms maximum).



Bus Timeout Supported



Automatic erase before write operation.



High reliability: typically 1,000,000 cycles endurance.



100 years data retention.



Standard 8-lead JEDEC SOP, 8-lead TSSOP, and 8-pad USON3*2-8 Pb-free packages.