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INA229 датащи(PDF) 21 Page - Texas Instruments |
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INA229 датащи(HTML) 21 Page - Texas Instruments |
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21 / 48 page ![]() Return to the Summary Table. Table 7-5. CONFIG Register Field Descriptions Bit Field Type Reset Description 15 RST R/W 0h Reset Bit. Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to default values. 0h = Normal Operation 1h = System Reset sets registers to default values This bit self-clears. 14 RSTACC R/W 0h Resets the contents of accumulation registers ENERGY and CHARGE to 0 0h = Normal Operation 1h = Clears registers to default values for ENERGY and CHARGE registers 13-6 CONVDLY R/W 0h Sets the Delay for initial ADC conversion in steps of 2 ms. 0h = 0 s 1h = 2 ms FFh = 510 ms 5 TEMPCOMP R/W 0h Enables temperature compensation of an external shunt 0h = Shunt Temperature Compensation Disabled 1h = Shunt Temperature Compensation Enabled 4 ADCRANGE R/W 0h Shunt full scale range selection across IN+ and IN–. 0h = ±163.84 mV 1h = ± 40.96 mV 3-0 RESERVED R 0h Reserved. Always reads 0. www.ti.com INA229-Q1 SLYS024A – MAY 2020 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: INA229-Q1 |
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