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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320F28076PZP датащи(PDF) 60 Page - Texas Instruments |
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TMS320F28076PZP датащи(HTML) 60 Page - Texas Instruments |
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60 / 192 page  7.9.6.3 Sampling Window Width for Input Signals The following section summarizes the sampling window width for input signals for various input qualifier configurations. Sampling frequency denotes how often a signal is sampled with respect to SYSCLK. Sampling frequency = SYSCLK/(2 QUALPRD), if QUALPRD 0 ´ ¹ (1) Sampling frequency = SYSCLK, if QUALPRD 0 = (2) Sampling period = SYSCLK cycle 2 QUALPRD, if QUALPRD 0 ´ ¹ ´ (3) In Equation 1, Equation 2, and Equation 3, SYSCLK cycle indicates the time period of SYSCLK. Sampling period = SYSCLK cycle, if QUALPRD = 0 In a given sampling window, either 3 or 6 samples of the input signal are taken to determine the validity of the signal. This is determined by the value written to GPxQSELn register. Case 1: Qualification using 3 samples Sampling window width = (SYSCLK cycle × 2 × QUALPRD) × 2, if QUALPRD ≠ 0 Sampling window width = (SYSCLK cycle) × 2, if QUALPRD = 0 Case 2: Qualification using 6 samples Sampling window width = (SYSCLK cycle × 2 × QUALPRD) × 5, if QUALPRD ≠ 0 Sampling window width = (SYSCLK cycle) × 5, if QUALPRD = 0 Figure 7-14 shows the general-purpose input timing. GPIOxn SYSCLK t w(GPI) Figure 7-14. General-Purpose Input Timing TMS320F28076, TMS320F28075 SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021 www.ti.com 60 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28076 TMS320F28075 |
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