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ISM303DAC датащи(PDF) 57 Page - STMicroelectronics |
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ISM303DAC датащи(HTML) 57 Page - STMicroelectronics |
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57 / 80 page ![]() DocID030988 Rev 2 57/80 ISM303DAC Register description 80 8.5 CTRL3_A (22h) Control register 3 (r/w) Table 38. CTRL3_A register ST2 ST1 TAP_X_EN TAP_Y_EN TAP_Z_EN LIR H_LACTIVE PP_OD Table 39. CTRL3_A register description ST [2:1] Self-test enable. Default value: 00 (00: Self-test disabled; Other: see Table 40) TAP_X_EN Tap recognition on X direction enable. Default value: 0 (0: disabled; 1: enabled) TAP_Y_EN Tap recognition on Y direction enable. Default value: 0 (0: disabled; 1: enabled) TAP_Z_EN Tap recognition on Z direction enable. Default value: 0 (0: disabled; 1: enabled) LIR Latched Interrupt. Switches between latched ('1'-logic) and pulsed ('0'-logic) mode for function source signals and interrupts routed to pins (wakeup, tap, double-tap, tilt, pedometer, significant motion). Default value: 0 (0: interrupt request not latched; 1: interrupt request latched) H_LACTIVE Interrupt active high, low. Default value: 0 (0: active high; 1: active low) PP_OD Push-pull/open-drain selection on interrupt pad. Default value: 0 (0: push-pull; 1: open-drain) Table 40. Self-test mode selection ST2 ST1 Self-test mode 0 0 Normal mode 0 1 Positive sign self-test 1 0 Negative sign self-test 1 1 Not allowed |
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