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LMH6321 датащи(PDF) 21 Page - Texas Instruments |
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LMH6321 датащи(HTML) 21 Page - Texas Instruments |
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21 / 41 page ![]() 11 Layout 11.1 Layout Guidelines 11.1.1 SOIC Layout Guidelines (D Package Without a Thermal Pad) For best operational performance of the device, use good PCB layout practices, including: • Noise can propagate into analog circuitry through the power pins of the circuit. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single- supply applications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. • In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible, as illustrated in Figure 11-2. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Cleaning the PCB following board assembly is recommended for best performance. • Any precision integrated circuit can experience performance shifts resulting from moisture ingress into the plastic package. Following any aqueous PCB cleaning process, baking the PCB assembly is recommended to remove moisture introduced into the device packaging during the cleaning process. A low-temperature, post-cleaning bake at 85°C for 30 minutes is sufficient for most circumstances. The SOIC-8 surface-mount package is excellent for applications requiring high output current with low average power dissipation. To achieve the best possible thermal performance with the SOIC-8 package, solder the device directly to a circuit board. Sockets degrade thermal performance because much of the heat is dissipated by conduction through the package pins. Use wide circuit board traces on all device pins, including pins that are not connected. For more information on designing the circuit board, see the BUF634AD Evaluation module user's guide. www.ti.com BUF634A SBOS948D – FEBRUARY 2019 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: BUF634A |
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