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T1024 датащи(PDF) 38 Page - Freescale Semiconductor, Inc

номер детали T1024
подробное описание детали  QorIQ T1024 Reference Design Board
PDF  49 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

T1024 датащи(HTML) 38 Page - Freescale Semiconductor, Inc

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CPLD_RSTCON field descriptions (continued)
Field
Description
4–5
-
This field is reserved.
6
XGT1_RST
0
No reset occurs.
1
Write a logic 1 will produce 10G BASE-T PHY(AQR105) reset# signal, this bit can auto clear.
7
XGT2_RST
0
No reset occurs.
1
Write a logic 1 will produce 2.5G SGMII PHY(AQR105) reset# signal, this bit can auto clear.
3.1.6 Reset Control Register (CPLD_RSTCON2 )
Address: 0h base + 11h offset = 11h
Bit
0
1
2
3
4
5
6
7
Read
Reserved
TDMR_RST
PEX_RST
MPEX1_
RST
MPEX2_
RST
Write
w1c
w1c
w1c
w1c
Reset
0
0
0
0
0
0
0
0
CPLD_RSTCON2 field descriptions
Field
Description
0–3
-
This field is reserved.
4
TDMR_RST
0
No reset occurs.
0
Write a logic 1 will produce TDM riser card reset# signal, this bit can auto clear.
5
PEX_RST
0
No reset occurs.
1
Write a logic 1 will produce PCIe x4 slot reset# signal, this bit can auto clear.
6
MPEX1_RST
0
No reset occurs.
1
Write a logic 1 will produce miniPCIe card1 reset# signal, this bit can auto clear.
7
MPEX2_RST
0
No reset occurs.
1
Write a logic 1 will produce miniPCIe card2 reset# signal, this bit can auto clear.
CPLD Memory Map/Register Definition
QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015
38
Freescale Semiconductor, Inc.



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