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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM8S датащи(PDF) 409 Page - STMicroelectronics |
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STM8S датащи(HTML) 409 Page - STMicroelectronics |
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409 / 467 page  DocID14587 Rev 14 409/467 RM0016 Controller area network (beCAN) 427 23.11.9 CAN error status register (CAN_ESR) Address offset: See Table 71. Reset value: 0000 0000 (00h) 7 654 3210 Reserved LEC[2:0] Reserved BOFF EPVF EWGF r rw rw rw rrrr Bit 7 Reserved. Bit 6:4 LEC[2:0] Last error code This field holds a code which indicates the type of the last error detected on the CAN bus. If a message has been transferred (reception or transmission) without error, this field will be cleared to ‘0’. The code 7 is unused and may be written by the CPU to check for update. 000: No Error 001: Stuff Error 010: Form Error 011: Acknowledgment Error 100: Bit recessive Error 101: Bit dominant Error 110: CRC Error 111: Set by software Bit 3 Reserved. Bit 2 BOFF Bus-off flag This bit is set by hardware when it enters the bus-off state. The bus-off state is entered on CAN_TECR overrun, TEC greater than 255, refer to Section 23.6.5 on page 396. Bit 1 EPVF Error passive flag This bit is set by hardware when the Error Passive limit has been reached (Receive Error Counter or Transmit Error Counter greater than 127). Bit 0 EWGF Error warning flag This bit is set by hardware when the warning limit has been reached. Receive Error Counter or Transmit Error Counter greater than 96. |
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