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STM8S датащи(PDF) 370 Page - STMicroelectronics |
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STM8S датащи(HTML) 370 Page - STMicroelectronics |
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370 / 467 page ![]() Universal asynchronous receiver transmitter (UART) RM0016 370/467 DocID14587 Rev 14 22.7.8 Control register 4 (UART_CR4) Address offset: 0x07 Reset value: 0x00 7 654 3210 Reserved LBDIEN LBDL LBDF ADD[3:0] r rwrw rw rwrw rw rw Bit 7 Reserved, must be kept cleared. Bit 6 LBDIEN: LIN Break Detection Interrupt Enable. Break interrupt mask (break detection using break delimiter). 0: LIN break detection interrupt disabled 1: LIN break detection interrupt enabled Bit 5 LBDL: LIN Break Detection Length. This bit is for selection between 11 bit or 10 bit break detection. 0: 10 bit break detection 1: 11 bit break detection Bit 4 LBDF: LIN Break Detection Flag. LIN Break Detection Flag (Status flag) This bit is set by hardware and cleared by software writing 0. 0: LIN Break not detected 1: LIN Break detected An interrupt is generated when LBDF=1 if LBDIEN=1 Bits 3:0 ADD[3:0]: Address of the UART node. This bitfield gives the address of the UART node. This is used in multi-processor communication during mute mode, for wakeup with address mark detection. |
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