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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AX68004LF датащи(PDF) 17 Page - ASIX Electronics Corporation |
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AX68004LF датащи(HTML) 17 Page - ASIX Electronics Corporation |
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17 / 57 page  17 AX6800x 2/4-Port USB KVM Switch SoC Copyright © 2015 ASIX Electronics Corporation. All rights reserved. Table 1-2: Chip Configuration Pin Description Chip Configuration Pins Pin Name Type Pin No Pin Description 64 100 BURN_FLASH _EN I5/PD 28 45 Please NC or pull down with 10Kohm to allow the CPU to proceed with normal boot after power-on reset and to disable In-System-Programming (ISP) mode via UART 0. Please pull up with 4.7Kohm to temporarily enable ISP mode for initial Flash memory programming via UART 0. This puts the CPU in reset state during the ISP mode. BURN_FLASH _921K I5/PU 26 42 When ISP mode is enabled (BURN_FLASH_EN = pull-up), please NC or pull up with 10Kohm to enable higher speed of 921.6Kbps baud rate at UART 0. Please pull down with 4.7Kohm to enable normal speed of 115.2Kbps baud rate at UART 0 during ISP mode. When the ISP mode is disabled (BURN_FLASH_EN = pull-down), this pin has no effect. Table 1-3: USB Transceiver Pin Description USB Transceiver Pins Pin Name Type Pin No Pin Description 64 100 U0_DP AB 50 77 Upstream USB Port 0 D+. U0_DM AB 51 78 Upstream USB Port 0 D-. U1_DP AB 53 82 Upstream USB Port 1 D+. U1_DM AB 54 83 Upstream USB Port 1 D-. U2_DP AB - 81 Upstream USB Port 2 D+. U2_DM AB - 80 Upstream USB Port 2 D-. U3_DP AB - 85 Upstream USB Port 3 D+. U3_DM AB - 84 Upstream USB Port 3 D-. D0_DP AB 48 75 Downstream USB Port0 D+. D0_DM AB 47 74 Downstream USB Port0 D-. D1_DP AB 46 71 Downstream USB Port1 D+. D1_DM AB 45 70 Downstream USB Port1 D-. D2_DP AB - 72 Downstream USB Port2 D+. D2_DM AB - 73 Downstream USB Port2 D-. D3_DP AB - 68 Downstream USB Port3 D+. D3_DM AB - 69 Downstream USB Port3 D-. VDDA_USB P 49 76 Power for USB Transceivers, 3.3V. VSSA_USB P 52 79 Ground for USB Transceivers. Table 1-4: USB Upstream (Device Controller) VBUS Pin Description USB Upstream VBUS Pins Pin Name Type Pin No Pin Description 64 100 U0_VBUS I5, PD 64 99 Upstream Port 0 VBUS. Used to detect the VBUS status for Upstream Port 0 U1_VBUS I5, PD 63 98 Upstream Port 1 VBUS. Used to detect the VBUS status for Upstream Port 1 U2_VBUS I5, PD - 97 Upstream Port 2 VBUS. Used to detect the VBUS status for Upstream Port 2 U3_VBUS I5, PD - 100 Upstream Port 3 VBUS. Used to detect the VBUS status for Upstream Port 3 |
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